User`s manual
Bit(s)
09
10
11
12
13
14
IS
Designation
(Maintenance)
NPR Status Overflow
(Vector B)
Master
Clear
NPR Status Overflow
Interrupt
Enable
NPR
Status
Interrupt
Enable
NPR
Status
Interrupt
(Vector B)
Table 3-2 (Cont)
System Control Register Bit Assignments
Function
Set
to
one
by the Microprocessor whenever
the
~
..
TR
Status Register/silo
is
full. Failure occurs
whenever
the
PDP-II
program does
not
promptly
read
the
NPR Status Register
contents
following
a
SCR
15
interrupt,
and 64 NPR
status
entries
have occurred.
SCR 10 does
not
cause an inter-
rupt
unless SCR
12
has been
set
to
one
by
the
PDP-II
program. Cleared
by
Initialize.
When set
to
one, clears the following bits in the
DVIl:
SCR bits 0-3,6,7,9,10,11,12,13,15
RIC bits
0-15
LCR bits
7-14
NSR
bit
IS
The Received
Character SiJo
is
also cleared This
bit
is
self-clearing.
When set
to
one,
enables
the
setting
of
SCR
10
to
generate an
interrupt
request. Cleared
by
Initilize.
When set
to
one,
enables
the
setting
of
SCR IS
to
generate an
interrupt
request. Cleared
by
Initialize.
Unused.
Set
to
one
whenever
the
Microprocessor loads
data
into
the
NPR
Status
Register
to
report
an
interrupt
condition
occurring during
data
transmission. Set
to
zero whenever
the
PDP-II
program reads
the
NPR
Status
Register. This
bit
is read
only
except
when
Bits 07 and IS Write Enable
(SCR
09)
are
set
to
one,
in which case
it
is read/write. SCR IS
does
not
cause an
interrupt
unless SCR
13
has
been
set
to
one
by
the
PDP-II
program. Cleared
by
Initialize.
3-13
Read/Write
Read
or
Write
Read
or
Write
Read
or
Write
Read
or
Write
Read
or
R/W