User`s guide

A
I/O Space Address Maps
This appendix provides lists of the physical EB164 I/O space assignments,
including CIA operating register address space maps and PCI/ISA device
register maps. Refer to Chapter 4 for detailed information on sparse/dense
space and address translation. The lists include only that portion that is
unique to EB164 and that affects or reflects the system environment. For full
descriptions of all EB164 registers refer to the Alpha 21164 Microprocessor
Hardware Reference Manual, the DECchip 21171 Core Logic Chipset Technical
Reference Manual, and applicable manufacturer’s chip data sheets.
A.1 PCI Sparse Memory Space
There are three regions in the PCI sparse memory contiguous CPU address
space:
• Region 0 occupies physical addresses 80.0000.0000 through 83.FFFF.FFFF.
• Region 1 occupies physical addresses 84.0000.0000 through 84.FFFF.FFFF.
• Region 2 occupies physical addresses 85.0000.0000 through 85.7FFF.FFFF.
Refer to Section 4.2.2 for additional information.
A.2 PCI Sparse I/O Space
There are two regions in the PCI sparse I/O contiguous CPU address space:
• Region A occupies physical addresses 85.8000.0000 through 85.BFFF.FFFF.
• Region B occupies physical addresses 85.C000.0000 through 85.FFFF.FFFF.
Refer to Section 4.2.4 for additional information on PCI sparse I/O space.
I/O Space Address Maps A–1