User`s guide
4.2 21164 Address Mapping to PCI Space
Table 4–13 PCI Target Address Translation—Direct Mapped (SG Mapping
Disabled)
PCI_MASK<31:20> Translated Address <32:5>
0000 0000 0000 T_BASE<32:20>:pci_ad<19:5>
0000 0000 0001 T_BASE<32:21>:pci_ad<20:5>
0000 0000 0011 T_BASE<32:22>:pci_ad<21:5>
0000 0000 0111 T_BASE<32:23>:pci_ad<22:5>
0000 0000 1111 T_BASE<32:24>:pci_ad<23:5>
0000 0001 1111 T_BASE<32:25>:pci_ad<24:5>
0000 0011 1111 T_BASE<32:26>:pci_ad<25:5>
0000 0111 1111 T_BASE<32:27>:pci_ad<26:5>
0000 1111 1111 T_BASE<32:28>:pci_ad<27:5>
0001 1111 1111 T_BASE<32:29>:pci_ad<28:5>
0011 1111 1111 T_BASE<32:30>:pci_ad<29:5>
0111 1111 1111 T_BASE<32:31>:pci_ad<30:5>
1111 1111 1111 T_BASE<32>:pci_ad<31:5>
If the SG bit is set, then the translated address is generated by a table lookup.
The incoming PCI address is used to index a table stored in system memory.
This table is referred to as a scatter-gather map. The translated base register
specifies the starting address of the scatter-gather map table. Bits of the
incoming PCI address are used as an offset from the base of the table. The
map entry provides the physical address of the page.
Each scatter-gather map entry maps an 8KB page of PCI address space into
an 8KB page of the processor’s address space. Each scatter-gather map entry
is a quadword. Each entry has a valid bit in bit position 0. Address bit <13>
is at bit position 1 of the map entry. Because the EB164 only implements valid
memory addresses up to 1GB, bits <63:18> of the scatter-gather map entry
should be programmed to 0. Bits <17:1> of the scatter-gather entry are used to
generate the physical page address. This is appended to the bits <12:5> of the
incoming PCI address to generate the memory address that needs to go out on
the system bus.
The size of the scatter-gather map table is determined by the size of the PCI
target window as defined by the PCI mask register (Table 4–14). The number
of entries is the window size divided by the 8KB page size. The size of the
table is the number of entries multiplied by 8 bytes.
System Address Mapping 4–23