User`s guide

4.2 21164 Address Mapping to PCI Space
Note
If the data written by the processor has holes, that is, some of the
longwords have been masked out, the corresponding transfer will still
be performed on the PCI bus with disabled byte-enables. Downstream
bridges must be able to deal with disabled byte-enables on the PCI bus
during write transactions.
PCI dense memory space has the following advantages over PCI sparse
memory space:
Some software requires memory-like accesses such that accesses on the
PCI are adjacent Alpha addresses.
PCI bus burst transfers are not possible in sparse space apart from two
longword bursts for quadword write operations. Dense space allows both
read and write bursting.
Dense space allows separate accesses to be merged in read and write
buffers. This is not allowed in sparse space.
In general, sparse space accesses are separated by memory barriers
to avoid read/write buffer merging. Dense space accesses only require
memory barriers when explicit ordering is required by software. Therefore,
fewer MB instructions should be needed.
4.2.6 PCI Configuration Space (87.0000.0000 Through 87.1FFF.FFFF)
A read or write access to the PCI configuration space causes a configuration
read or write cycle on the PCI. There are two classes of targets, which are
selected based on the value of the CIA chip’s PCI configuration register (CFG):
Type 0: These are targets on the EB164’s primary 64-bit PCI bus. These
are selected when CFG<1:0> = 00.
Type 1: These are targets on a secondary PCI bus. These are selected
when CFG<1:0> = 01.
Software must first program the CFG register before running a configuration
cycle. Sparse address decoding is used. CPU address bits <6:3> are used to
generate both the length of the PCI transaction in bytes, and the byte-enables.
PCI address bits <1:0> are obtained from CFG<1:0>. CPU address bits <28:7>
correspond to PCI address bits <23:2> and provide the configuration command
information. The high-order PCI address bits <31:24> are always zero.
4–14 System Address Mapping