User`s guide

3.8 Reset and Initialization

A TL7702B power monitor senses +3 V dc to ensure that it is stable before

the 21164 CPU’s inputs and I/O pins are driven (see Figure 3–6). Any device

that drives the 21164 has a tristate output controlled by the power monitor

output. This is necessary because the 21164 must not have its inputs driven to

greater than 4.0 V if the 3.3-V level to the 21164 is not greater than 2.5 V. The

TL7702B provides this function by sensing whether the 3.3-V level is above or

below 2.5 V.

Should the +3-V dc supply fail, the power monitor enables sense_dis, which is

applied to the reset logic (eb164.38, 39). The reset logic generates a group of

reset functions to the 21164 and the remainder of the system.

An external reset switch can be connected to header J2 (eb164.39). The reset

function initializes the 21164 and the system logic, but does not send an

initialization pulse to the ISA devices. The p_dcok signal provides a full

system initialization, equivalent to a power-down and power-up cycle.

In addition, the fan sense signal (fan_ok_l) is logically ORed with the

reset switch output and, when enabled, drives cpu_dcok and cpu_reset_l,

indicating a fan failure.

The rst_l signal is buffered and drives a set of sys_reset signals to reset the

remainder of the system, including PCI and ISA devices through the CIA chip.

Functional Description 3–19