User`s guide

3.2 Digital Semiconductor 21171 Chipset

Two DMA conversion methods are supported: direct mapping, where a base

offset is concatenated with the PCI address, and scatter-gather mapping,

which maps an 8KB PCI page to any 8KB memory page. The CIA contains

an 8-entry scatter-gather translation lookaside buffer (TLB), where each

entry holds four consecutive page table entries (PTEs).

Refer to Chapter 4 for additional details on PCI and DMA address mapping.

3.2.2 DSW Overview

Four data switch (DSW) ASICs provide the interface between the 128-bit 21164

data bus (data<127:0>) and 16-bit check bus (data_check<15:0>), the 288-bit

DRAM memory data bus (mem_dat<287:0>), and the CIA chip for PCI data

(iod<63:0> and iod_ecc<7:0>). The DSW chips (four required) provide the

system with a 256-bit-wide memory path.

The DSW chip contains the memory interface data path. This includes a

64-byte victim buffer, a 32-byte I/O read buffer, four 32-byte I/O write buffers,

and two DMA buffers.

The four DSW chips receive data from the CPU by means of the 128-bit CPU

data bus. They transfer data to and from the CIA by means of the 64-bit IOD

bus. Any data directed to or from the PCI bus must be transferred through the

CIA. The DSW chips also provide an interface to the 256-bit-wide memory data

bus.

3.3 Main Memory Interface

Four DSW chips, along with the CIA, provide a 256-bit-wide, high-speed

memory data path for both CPU memory accesses and PCI DMA. The EB164

supports and requires eight DRAM SIMM modules. The DSWs are conﬁgured

to run in 256-bit mode.

Quadword ECC is supported on the DRAM and CPU buses. The same

quadword ECC that is supported by the 21164 is also supported on the memory

bus. Byte parity is generated on the PCI bus. Only 64-byte transfers are

supported because the DSW chips do not support the 21164’s optional 32-byte

mode.

The EB164 supports a maximum of 512MB of main memory. In all cases, the

memory is organized as one single bank. All CPU cacheable memory accesses

and PCI DMA accesses are controlled and routed to main memory by the 21171

chipset.

The EB164 supports the following SIMM sizes:

• 1MB 36-bit DRAM SIMM

3–6 Functional Description