User`s guide

1.1 System Components and Features
A Xilinx XC17128 serial ROM (SROM) contains initial code that is loaded
into the 21164 instruction cache (Icache) on power-up. A serial line
interface is also provided to allow direct connection to a terminal line for
debugging purposes.
• Programmable array logic (PAL) devices for the following functions:
One PAL for utility bus (Ubus) decoding
One PAL for interrupts
Two PAL devices for memory row address strobe (RAS) bank generation
and buffering
1.1.7 Software Support
Software support code, consisting of a debug monitor and Windows NT ARC
firmware is contained in a 1MB flash ROM. Development code can be generated
on a host system and loaded into the EB164 through a serial line, an Ethernet
board, or a diskette. In addition, sectors of the flash ROM can be programmed
for an application-specific purpose. Source code for the debug monitor, serial
ROM power-up code, and example PALcode is provided in the Alpha Evaluation
Board Software Developer’s Kit (EBSDK). The monitor provides functions that
allow you to:
• Download files through serial and Ethernet ports and diskette.
• Load data from a ROM through the debug monitor.
• Examine and deposit the EB164 system registers, a few 21164 internal
processor registers (IPRs), and I/O mapped registers.
• Examine and modify DRAM and I/O mapped memory.
• Disassemble CPU instructions in memory.
• Transfer control to programs in memory.
• Perform native debugging operations, including breakpoints and single
stepping.
• Perform full source-level debugging operations by using DECladebug
software running on a host communicating through an Ethernet
connection.
• Perform a memory image dump.
Introduction to the EB164 1–5