User`s guide

B
SROM Initialization
The 21164 Alpha microprocessor provides a mechanism for loading the initial
instruction stream (Istream) from a compact serial ROM (SROM) to start
the bootstrap procedure. The SROM executable image is limited to the size
of the CPU instruction cache (Icache). Because the image is running only
in the Icache, it is relatively difficult to debug. Therefore, Digital suggests
that the scope and purpose of this code be limited to performing the system
initialization necessary to boot the next level of firmware contained in the
larger system (flash) ROM.
However, trade-offs between simplicity and convenience were made to support
the EB164 in various configurations. The source code for the EB164 SROM is
available with free licensing for use and modification.
B.1 SROM Initialization
After reset, the contents of the SROM are loaded into the Icache. After loading
the Icache, the CPU begins execution at location zero. Execution is performed
in the CPU PALmode environment with privileged access to the computer
hardware. The general steps performed by the SROM initialization are:
1. Initialize the CPU’s internal processor registers (IPRs).
2. Set up internal L1/L2 caches.
3. Perform the minimum I/O subsystem initialization necessary to access the
real-time clock (RTC) and the system’s flash ROM.
4. Detect CPU speed by polling the periodic interrupt flag (PIF) in the RTC.
5. Set up memory and backup cache (Bcache) parameters based on the speed
of the CPU.
6. Wake up the DRAMs.
7. Initialize the Bcache.
8. Copy the contents of the entire system memory to itself to ensure good
memory data parity.
SROM Initialization B–1