User`s guide

A.6 Hardware-Speciﬁc and Miscellaneous Register Space

A.6.3 CIA PCI Address Translation Map Space

CIA PCI address translation map space occupies physical addresses

87.6000.0000 through 87.6FFF.FFFF. Table A–15 lists all the CIA chip’s

PCI address translation registers.

Table A–15 PCI Address Translation Registers

TBIA WO 87.6000.0100 Scatter-gather translation buffer

invalidate register

W0_BASE RW 87.6000.0400 Window base 0 register

W0_MASK RW 87.6000.0440 Window mask 0 register

T0_BASE RW 87.6000.0480 Translated base 0 register

W1_BASE RW 87.6000.0500 Window base 1 register

W1_MASK RW 87.6000.0540 Window mask 1 register

T1BASE RW 87.6000.0580 Translated base 1 register

W2_BASE RW 87.6000.0600 Window base 2 register

W2_MASK RW 87.6000.0640 Window mask 2 register

T2_BASE RW 87.6000.0680 Translated base 2 register

W3_BASE RW 87.6000.0700 Window base 3 register

W3_MASK RW 87.6000.0740 Window mask 3 register

T3_BASE RW 87.6000.0780 Translated base 3 register

W_DAC RW 87.6000.07C0 Window DAC register

LTB_TAG0 RW 87.6000.0800 Lockable translation buffer tag0

LTB_TAG1 RW 87.6000.0840 Lockable translation buffer tag1

LTB_TAG2 RW 87.6000.0880 Lockable translation buffer tag2

LTB_TAG3 RW 87.6000.08C0 Lockable translation buffer tag3

TB_TAG0 RW 87.6000.0900 Translation buffer tag0

TB_TAG1 RW 87.6000.0940 Translation buffer tag1

TB_TAG2 RW 87.6000.0980 Translation buffer tag2

TB_TAG3 RW 87.6000.09C0 Translation buffer tag3

TB0_PAGE0 RW 87.6000.1000 Translation buffer 0 page0

TB0_PAGE1 RW 87.6000.1040 Translation buffer 0 page1

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A–20 I/O Space Address Maps