User`s guide

A.5 PCI Interrupt Acknowledge/Special Cycle Address Space
A.5 PCI Interrupt Acknowledge/Special Cycle Address Space
This space occupies physical addresses 87.2000.0000 through 87.3FFF.FFFF.
Refer to Section 4.2.7 for additional information.
A.6 Hardware-Specific and Miscellaneous Register Space
This space occupies physical addresses 87.4000.0000 through 87.6FFF.FFFF
and covers the 21171-CA (CIA) address space. Registers accessed in this space
use a hardware-specific variant of sparse space encoding. CPU address bits
<27:6> are used as a longword address. CPU address bits <5:0> must be zero.
All CIA registers are accessed with longword granularity.
A.6.1 CIA Main CSR Space
This space occupies physical addresses 87.4000.0000 through 87.4FFF.FFFF.
Table A–13 lists all the CIA chip’s general control, diagnostic, and error
registers.
Table A–13 CIA Control, Diagnostic, and Error Registers
Register Type Address Description
PCI_REV RO 87.4000.0080 PCI revision (CIA revision)
PCI_LAT RO 87.4000.00C0 PCI latency
CIA_CTRL RW 87.4000.0100 CIA control register
CIA_CNFG RO 87.4000.0200 CIA configuration register
HAE_MEM RW 87.4000.0400 Hardware address extension for sparse
memory
HAE_IO RW 87.4000.0440 Hardware address extension for sparse I/O
CFG RW 87.4000.0480 PCI configuration register
CACK_EN RW 87.4000.0600 CIA acknowledgement control register
CIA_DIAG RW 87.4000.2000 CIA diagnostic control register
DIAG_CHECK RW 87.4000.3000 Diagnostic check register
PERF_
MONITOR
RO 87.4000.4000 Performance monitor register
PERF_
CONTROL
RW 87.4000.4040 Performance control register
CPU_ERR0 RO 87.4000.8000 CPU error information register 0
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A–18 I/O Space Address Maps