User`s guide

A.3 PCI Dense Memory Space
Table A–10 Flash ROM Configuration Registers
Offset
Data Written on
First Access Register
X
1
FF Read array/reset register
X 90 Intelligent identifier register
X 70 Read status register
X 50 Clear status register
BA
2
20 Erase setup/confirm register
X B0 Erase suspend/resume register
WA
3
40 Byte write setup/write register
WA 10 Alternate byte write setup/write register
1
X = Any byte within the flash ROM address range.
2
BA = Target address within the block being erased.
3
WA = Target address of write transaction to memory.
I/O Space Address Maps A–15