User`s guide

A.2 PCI Sparse I/O Space
Table A–7 (Cont.) SIO PCI-to-ISA Bridge Operating Register Address Space
Map
Offset Address Register
083 85.C000.1060 DMA Channel 1 Page
084 85.C000.1080 DMA Page Register Reserved
085 85.C000.10A0 DMA Page Register Reserved
086 85.C000.10C0 DMA Page Register Reserved
087 85.C000.10E0 DMA Channel 0 Page
088 85.C000.1100 DMA Page Register Reserved
089 85.C000.1120 DMA Channel 6 Page
08A 85.C000.1140 DMA Channel 7 Page
08B 85.C000.1160 DMA Channel 5 Page
08C 85.C000.1180 DMA Page Register Reserved
08D 85.C000.11A0 DMA Page Register Reserved
08E 85.C000.11C0 DMA Page Register Reserved
08F 85.C000.11E0 DMA Low Page Register Refresh
090 85.C000.1200 DMA Page Register Reserved
092 85.C000.1240 Port 92
094 85.C000.1280 DMA Page Register Reserved
095 85.C000.12A0 DMA Page Register Reserved
096 85.C000.12C0 DMA Page Register Reserved
098 85.C000.1300 DMA Page Register Reserved
09C 85.C000.1380 DMA Page Register Reserved
09D 85.C000.13A0 DMA Page Register Reserved
09E 85.C000.13C0 DMA Page Register Reserved
09F 85.C000.13E0 DMA Low Page Register Refresh
0A0 85.C000.1400 INT2 Control
0A1 85.C000.1420 INT2 Mask
0C0 85.C000.1800 DMA2 CH0 Base and Current Address
0C2 85.C000.1840 DMA2 CH0 Base and Current Count
0C4 85.C000.1880 DMA2 CH1 Base and Current Address
(continued on next page)
A–10 I/O Space Address Maps