User`s manual

4.1 PCI Interrupts and Arbitration

Figure 4–2 Interrupt and Interrupt Mask Registers

RAZRAZRAZRAZRAZRAZRAZ intd3

76543210

LJ-04211.AI

Notes:

Interrupt and Interrupt Mask Register 3 (ISA Address 806h)

Interrupt and Interrupt Mask Register 2 (ISA Address 805h)

Interrupt and Interrupt Mask Register 1 (ISA Address 804h)

RAZ = Read-as-Zero, Read-Only

Interrupt Mask Register Is Write-Only

intb3intc0intc1intc2intc3intd0intd1intd2

76543210

inta0inta1inta2inta3intb0intb1intb2 sio

76543210

4.1.2 PCI/ISA Arbitration

Arbitration logic is implemented in the Intel 82378ZB Saturn IO (SIO) chip.

The arbitration scheme is ﬂexible and software programmable. Refer to

the Intel 82420/82430 PCIset ISA and EISA Bridges document for more

information about programmable arbitration.

4.2 ISA Devices

Figure 4–3 shows the Alpha PCI 64–275 ISA bus implementation with

peripheral devices and connectors. Also shown is the utility bus (Ubus) with

system support devices.

4.3 dc Power Distribution

The Alpha PCI 64–275 derives its power from a user-supplied, industry-

standard PC power supply. The power supply must provide 12 Vdc, 5 Vdc,

and +3.3 Vdc. The dc power is supplied through power connectors J27, J28,

J29, and J31 (see Figure 4–4). Power is distributed to the board logic through

dedicated power planes within the 6-layer board structure.

Functional Elements 4–5