User`s guide

4
System Address Mapping
This chapter describes the mapping of the 34-bit processor physical address
space into memory and I/O space addresses. It also includes the translations of
the processor-initiated address into a PCI address, and PCI-initiated addresses
into physical memory addresses.
4.1 CPU Address Mapping to PCI Space
The 34-bit physical sysBus address space is composed of the following:
• Memory address space
• Local I/O space, for registers residing on the sysBus (that is, registers in
the 21071-CA and 21071-DA chips)
• PCI space
Note
The sysBus represents the 21064A pin bus as well as control signals
between the 21071-CA and 21071-DA chips.
The PCI defines three physical address spaces: PCI memory space (for memory
residing on the PCI), PCI I/O space, and PCI configuration space. In addition
to these address spaces, the sysBus I/O space is also used to generate PCI
interrupt acknowledge cycles and PCI special cycles. Figure 4–1 shows the
address space. Table 4–1 provides a summary description of the spaces.
System Address Mapping 4–1