User`s guide

8. Scan the flash ROM for a special header that specifies where and how flash
ROM firmware should be loaded.
9. Copy the contents of the flash ROM to memory and begin code execution.
10. Pass parameters up to the next level of firmware to provide a predictable
firmware interface.
B.1.1 Firmware Interface
A firmware interface provides a mechanism for passing critical information
about the state of the system and CPU up to the next level of firmware.
This interface is achieved through the use of a set of defined SROM output
parameters, as described in Table B–1.
This particular firmware interface serves the Alpha 21064A microprocessor.
Other Alpha architecture implementations may require a different firmware
interface.
Table B–1 Output Parameter Descriptions
Output Parameter Parameter Description
r1 (t0) - AboxCtl value The AboxCtl value allows the next-level software to preserve
any system-specific Dcache configuration information.
This register also contains the superpage enables that
could be modified by both the next-level firmware and/or
operating system PALcodes. Report of machine checks is
enabled/disabled here.
r2 (t1) - BiuCtl value The BiuCtl value controls the external bus interface unit,
including L2 cache size and timing.
Caution
BiuCtl <2>, output enable, must
be set to 1 or 21064A hardware
damage may occur.
(continued on next page)
B–2 SROM Initialization