User`s guide

Figure A–13 Bank Set 8 Configuration Register
15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00
LJ-04190.AI
MBZ
S8_CHECK
S8_COLSEL
S8_SUBENA
S8_SIZE
S8_VALID
Table A–7 Bank Set 8 Configuration Register
Field Name Type Description
<15:10> Reserved MBZ —
<9> S8_CHECK RW, 0 Enable parity checking. When set, accesses to
bank set 8 will have their parity checked, as with
other bank sets. When clear, parity will not be
checked. When clear, bank set 8 must be mapped
into noncacheable space. Only bank set 8 has this
feature.
<8:6> S8_COLSEL — Column address selection. Indicates the number
of valid column bits expected at the DRAMs. Used
along with memory width information to generate
column row or column addresses. Memory width is
determined by the widemem pin.
S8_COLSEL field codes are listed here:
S8_COLSEL Row, Column Bits
0XX Reserved
100 9, 9
101 9, 8
11X Reserved
(continued on next page)
A–16 System Register Descriptions