User`s guide

Figure A–5 Error High Address Register
15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00
LJ-04182.AI
MBZ
ERR_HADR<33:21>
A.1.6 LD x _L Low Address Register
The LDx_L low address register is shown in Figure A–6. The register stores
the low-order bits of the last locked address. Bits <15:0> in the register
represent sysadr<20:5>. This register is read-only and is not initialized.
Figure A–6 LD x _L Low Address Register
15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00
LJ-04183.AI
LDXL_LARD<20:5>
A.1.7 LD x _L High Address Register
The LDx_L high address register is shown in Figure A–7. The register stores
the high-order bits of the locked address. Bits <12:0> in the register represent
sysadr<33:21>. This register is read-only and is not initialized.
Figure A–7 LD x _L High Address Register
15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00
LJ-04184.AI
MBZ
LDXL_HARD<33:21>
System Register Descriptions A–9