User`s guide

Table 4–8 PCI Target Window Enables
PCI_MASK<31:20>
1
Window Size Value of n
2
0000 0000 0000 1MB 20
0000 0000 0001 2MB 21
0000 0000 0011 4MB 22
0000 0000 0111 8MB 23
0000 0000 1111 16MB 24
0000 0001 1111 32MB 25
0000 0011 1111 64MB 26
0000 0111 1111 128MB 27
0000 1111 1111 256MB 28
0001 1111 1111 512MB 29
0011 1111 1111 1GB 30
0111 1111 1111 2GB 31
1111 1111 1111 4GB
3
32
1
Combinations of bits not shown in PCI_MASK<31:20> are not supported.
2
Depending on the target window size, only the incoming address bits <31:n> are compared with
bits <31:n> of the PCI base registers as shown in Figure 4–4. If n = 20 to 32, no comparison is
performed; n is also used in Figure 4–6.
3
When this combination is chosen, the WENB bit in the other PCI base register must be cleared;
otherwise, the two windows will overlap.
Based on the value of the PCI mask register, the unmasked bits of the
incoming PCI address are compared with the corresponding bit of each
window’s PCI base register. If the base registers and the incoming PCI address
match, the incoming PCI address has hit that target window; otherwise, it
missed that window. A window enable bit (WENB) is provided in the PCI
base register of each window to allow them to be independently enabled and
disabled.
The PCI target windows must be programmed such that the PCI address
ranges do not overlap. The compare scheme between the incoming PCI address
and the PCI base register (together with the PCI mask register) is shown in
Figure 4–4.
4–20 System Address Mapping