User guide

9.2.1 Module Display Control Register . ............... 9–5
9.2.2 Module Configuration Register................... 9–6
9.2.3 Interrupt and Interrupt Mask Registers 1, 2, 3, 4 .... 9–8
9.2.4 Memory Configuration Registers 0, 1, 2, 3 and Memory
Identification Register . . ....................... 9–8
9.2.5 Reset Reason Registers . ....................... 9–12
9.2.6 Heartbeat Register ............................ 9–14
9.2.7 Module Control Register 1 ..................... 9–14
9.2.8 Bcache Configuration Register ................... 9–16
9.3 ROM ......................................... 9–17
9.4 Super I/O Chip . . . ............................... 9–18
9.4.1 Serial Port Channels A and B ................... 9–18
9.4.2 Super I/O Register Address Space . ............... 9–19
9.5 Keyboard and Mouse Controller ..................... 9–21
9.6 TOY Clock ..................................... 9–22
9.6.1 TOY Clock Timekeeping Registers . ............... 9–23
9.6.2 TOY Clock Command Register ................... 9–24
9.7 Interval Timing Registers . . ....................... 9–25
9.7.1 Interval Timing Control Register . . ............... 9–26
9.7.2 Timer Registers .............................. 9–28
9.7.3 Timer Modes . ............................... 9–29
9.7.4 Interrupts . . . ............................... 9–31
9.7.5 Timer Interrupt Status Registers . . ............... 9–32
9.8 Watchdog Timer . . ............................... 9–33
9.9 Nonvolatile RAM . ............................... 9–36
10 VME Interface
10.1 VMEbus Master . . ............................... 10–2
10.1.1 Outbound Scatter-Gather Mapping ............... 10–4
10.1.1.1 Address Modifier . . . ....................... 10–6
10.1.1.2 Read-Modify-Write . . ....................... 10–6
10.1.2 Data Transfers ............................... 10–7
10.1.2.1 Single Mode Transfers ...................... 10–7
10.1.2.2 Block Mode Transfers....................... 10–7
10.1.3 Requesting the VMEbus. ....................... 10–9
10.2 VMEbus Slave . . ............................... 10–9
10.2.1 Decoding Addresses . . . ....................... 10–10
10.2.2 Inbound Scatter-Gather Entries . . . ............... 10–12
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