User guide
7.3.8 PCI Master Timeout . . . ....................... 7–7
7.3.9 Address Stepping in Configuration Cycles .......... 7–7
7.4 Address Space of Control/Status Registers ............. 7–7
7.5 Description of CSRs .............................. 7–9
7.5.1 Diagnostic Control/Status Register ............... 7–9
7.5.2 PCI Error Address Register ..................... 7–13
7.5.3 System Bus Error Address Register ............... 7–14
7.5.4 Dummy Registers 1 Through 3 . . . ............... 7–15
7.5.5 Translated Base Registers 1 and 2 . ............... 7–15
7.5.6 PCI Base Registers 1 and 2 ..................... 7–16
7.5.7 PCI Mask Registers 1 and 2 .................... 7–17
7.5.8 Host Address Extension Register 0 ............... 7–18
7.5.9 Host Address Extension Register 1 ............... 7–18
7.5.10 Host Address Extension Register 2 ............... 7–19
7.5.11 PCI Master Latency Timer Register............... 7–20
7.5.12 TLB Tag Registers 0 Through 7 . . . ............... 7–20
7.5.13 TLB Data Registers 0 Through 7 . . ............... 7–21
7.5.14 Translation Buffer Invalidate All Register:
0x1A0000400 . ............................... 7–22
8 PCI bus
8.1 Ethernet Controller .............................. 8–3
8.1.1 PCI Configuration Registers .................... 8–3
8.1.2 Ethernet Controller CSRs ...................... 8–4
8.1.3 PCI Cycles . . . ............................... 8–5
8.1.4 Ethernet Address ............................. 8–6
8.2 SCSI Controller . . ............................... 8–6
8.2.1 Connection and Termination .................... 8–6
8.2.2 SCSI ID .................................... 8–7
8.2.3 Programming . ............................... 8–7
8.2.4 PCI Configuration Registers .................... 8–7
8.2.5 SCSI Control Status Registers ................... 8–8
8.3 PCI I/O Companion Card . . . ....................... 8–11
9 Nbus
9.1 Nbus Address Space .............................. 9–1
9.1.1 SIO Chip PCI Configuration Space ............... 9–2
9.1.1.1 PCI Control Register ....................... 9–3
9.1.1.2 ISA Controller Recovery Timer Register . . ...... 9–4
9.1.1.3 ISA Clock Divisor Register ................... 9–4
9.2 Module Registers . ............................... 9–4
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