User guide

Figure 11–4 Interrupt/Mask Register #3
07 06 05 04 03 02 01 00
ML013319
PMC1 IRQ C
PMC0 IRQ C
804 :
PMC1 IRQ B
PMC0 IRQ B
SCSI IRQ
ETHER IRQ
SIO IRQ
VME IPL3
Figure 11–5 Interrupt/Mask Register #4
07 02 01 00
ML013321
Reserved
803 :
PMC1 IRQD
PMC0 IRQD
11.1.2 VIC64 Chip System Interrupt Controller
The Digital Alpha VME 4 system’s use of the VIC64 chip as an interrupt
controller is modified slightly by the operation of the DC7407, the SIO chip, and
the interrupt/mask registers. VMEbus interrupts are passed to the interrupt
/mask registers by the VIC64 interrupt priority lines.
Vectors returned from the VIC as system interrupt controller are ‘‘pre-pended’’
(using bits <10:8>) with the interrupting IPL.
The VIC64 chip system interrupt controller operation is described in the VIC64
chip documentation.
11–4 System Interrupts