User guide
Table 10–6 (Cont.) Interprocessor Communication Register Map Through VIF_
ABR
<byte 1>+ Register
Interprocessor communication registers (ICR)
07 8-bit general-purpose register 3 R/W
09 8-bit general-purpose register 4 R/W
0B VIC revision register Read-only. Provides VIC64
hardware revision.
0D VIC status register Read-only. Provides VIC64 status
revision.
0F Intercommunication register status Bits <4:0> are set when there is a
write access to the corresponding
ICR. See the VIC64 specification
for more complete details.
Interprocessor communication global switches (ICGS)
Write Only. A write to an odd address sets the switch; a Write to an even
address clears that switch.
010 Clear global switch 0
011 Set global switch 0
012 Clear global switch 1
013 Set global switch 1
014 Clear global switch 2
015 Set global switch 2
016 Clear global switch 3
017 Set global switch 3
(continued on next page)
10–16 VME Interface