User guide

Figure 8–2 PCI Configuration Registers
I/O Base Address (CBIO)
Memory Base Address (CBMA)
Reserved

Reserved
Reserved
N/S (=Not Supported)
Reserved
Reserved

Driver Area (CFDA)
Reserved
Reserved
Device ID = 0002h
Status
Vendor ID = 1011h
Command
Class Code Rev ID
N/SN/S Don't Care Latency Timer
Int LineX X Int Pin
: 00001000
: 00001004
: 00001008
: 0000100C
: 00001010
: 00001014
: 00001018

: 00001028
: 0000102C
: 00001030
: 00001034
: 00001038
: 0000103C
: 00001040

: 00001044 to 000010FC
ML013282
8.1.2 Ethernet Controller CSRs
The Ethernet controller has 16 CSRs that can be accessed by the PCI host bridge.
The address field in Table 8–1 reflects the offset from the CSR base address
(CBIO,CBMA). The CSRs are located in PCI I/O or memory space. The CSRs are
quadword-aligned and can only be accessed using longword instructions. See the
DECchip 21040-AA specifications for more details.
8–4 PCI bus