User guide

Figure 7–4 PCI Error Address Register: 0x1A0000020
31 30 08 07 06 05 04 03 02 01 00
LJ-04197.AI
PCI_ERR<31:0>
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Table 7–3 PCI Error Address Register
Field Name Type Description
<31:0> PCI_ERR<31:0> RO PCI error. Stores the address sent out on
the PCI bus ad<1:0> as a result of an I/O
transaction. The field logs the address of the
errors indicated by the NDEV, TABT, IOPE,
DDPE, IPTL, and IORT bits in the DCSR.
The register is valid only when one of these
error bits is set. If one of the bits is set, a
subsequent error of the same type will not
update the address logged in this register and
the LOST bit is set in DCSR.
7.5.3 System Bus Error Address Register
The system bus error address register holds the system bus address that was
being used when an error happened. The register is shown in Figure 7–5 and is
defined in Table 7–4.
Figure 7–5 System Bus Error Address Register: 0x1A0000040
31 30 08 07 06 05 04 03 02 01 00
LJ-04196.AI
SYS_ERR<33:5>
MBZ
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7–14 PCI Host Bridge