User guide

6.7.5 Memory Write Buffer
The memory write buffer has four entries for each chip. Each entry has four
longwords and corresponding ECC bits. The system bus interface loads the buffer
and the memory controller unloads it (both are 21071-CA functions).
6.7.6 Error Handling
The data path chips perform ECC on DMA transactions. The data is checked for
ECC errors during a DMA read transaction or a DMA-masked write transaction.
If the data contains a correctable error, the data path chips send corrected data
to its destination: DMA read buffer for DMA read transactions, memory write
buffer for DMA write transactions.
If the data contains an uncorrectable error (dual-bit ECC error), the data path
chips notify the PCI host bridge (21071-DA) and writes the bad ECC error in the
memory write buffer.
In case of a DMA-masked write transaction, ECC is generated for the merged
data going into the memory write buffer.
6–32 Cache and Memory Subsystem