User guide

Table 6–6 (Cont.) Configuration Register for Banks 0 and 1
Field Name
1
Type Description
<4:1> S0_SIZE RW Bank size in Mbytes. Indicates the size of the bank and
any subbanks. The size defines which bits are used in
comparing the base address with the physical address
(PA) and for generating the subset. S0_SIZE<3> must
be set to 0. The field codes for S0_SIZE<3:0> are:
S0_SIZE
<3:0> Compared Subset Set Size
0000 — — Reserved
0001 PA<33:29> PA<28> 512 MB
0010 PA<33:28> PA<27> 256 MB
0011 PA<33:27> PA<26> 128 MB
0100 PA<33:26> PA<25> 64 MB
0101 PA<33:25> PA<24> 32 MB
0110 PA<33:24> PA<23> 16 MB
0111 PA<33:23> PA<22> 8MB
1XXX — — Reserved
<0> S0_VALID RW, 0 Bank valid. When set, all timing and configuration
parameters for the bank are valid, and access to the
bank is allowed.
1
Field names are for Bank 0.
6.6.8.5 Bank Set Timing Registers
Each bank has two timing registers, A and B. These registers contain the
parameters for performing memory read and write transactions. The format
of the timing registers is identical for all banks.
A reset operation sets all parameters to their maximum values. However, this
can cause incorrect operation. Therefore, the software must program the timing
registers before the bank’s valid bit is set in the configuration register.
All the timing parameters are in multiples of memory clock (memclk) cycles. Most
of the timing parameters have a minimum value that is added to the programmed
value. In a program, subtract this minimum value from the desired value and
then write the value into the register.
6–24 Cache and Memory Subsystem