User guide

Figure 6–2 Address and Data Paths of Cache and Memory
ML013273
21071-BA0
32 Bits
32 Bits
32 Bits
32 Bits
32 Bits
32 Bits
32 Bits
32 Bits
memData <127:0>
Memory Address and Control
sysData <127:0> Check <21:0>
SysAdr
L2 Cache Ctrl
Tag Adr Ctrl
memECC <21:0>
21071-BA1 21071-BA2 21071-BA3
Memory
DRAMs
CPU
Cache
21071-CA
21071-DA Data Path Bit Assignments
memData LinessysData Lines
memData <31:0>21071-BA0 <31:0>
memData <63:32>21071-BA1 <63:32>
memData <95:64>21071-BA2 <95:64>
memData <127:96>21071-BA3 <127:96>
sysData <15:0>
The DECchip 21071-CA provides Bcache and memory control functions and also
controls the data paths located in the 21071-BA chips. The DECchip 21071-CA
arbitrates between the CPU and the PCI host bridge when they request use of
the system bus and Bcache.
Figure 6–3 shows a block diagram of the DECchip 21071-CA.
6–2 Cache and Memory Subsystem