User guide

Table 5–8 Scatter-Gather Map Address
PCI_MASK<31:20>
Scatter-Gather
Map
Table Size
Scatter-Gather
Map Address<32:3>
0000 0000 0000 1 KB T_BASE<32:10>:PCI ad<19:13>
0000 0000 0001 2 KB T_BASE<32:11>:PCI ad<20:13>
0000 0000 0011 4 KB T_BASE<32:12>:PCI ad<21:13>
0000 0000 0111 8 KB T_BASE<32:13>:PCI ad<22:13>
0000 0000 1111 16 KB T_BASE<32:14>:PCI ad<23:13>
0000 0001 1111 32 KB T_BASE<32:15>:PCI ad<24:13>
0000 0011 1111 6 KB T_BASE<32:16>:PCI ad<25:13>
0000 0111 1111 128 KB T_BASE<32:17>:PCI ad<26:13>
0000 1111 1111 256 KB T_BASE<32:18>:PCI ad<27:13>
0001 1111 1111 512 KB T_BASE<32:19>:PCI ad<28:13>
0011 1111 1111 1 MB T_BASE<32:20>:PCI ad<29:13>
0111 1111 1111 2 MB T_BASE<32:21>:PCI ad<30:13>
1111 1111 1111 4 MB T_BASE<32:22>:PCI ad<31:13>
Figure 5–6 shows the entire translation process from the PCI address to the
physical address on a window implementing scatter-gather mapping. The
following list describes the translation operation:
1. Bits ad<12:5> of the PCI address directly generate the page offset.
2. The relevant bits of the PCI address (as specified by the window mask
register, depending on the size of the window) generate the offset into the
scatter-gather map.
3. The relevant bits of the translated base register indicate the base address of
the scatter-gather map.
4. The map base is appended to the map offset to generate the address of the
corresponding scatter-gather entry.
5. Bits <20:1> of the map are used to generate the physical page address, which
is appended to the page offset to generate the PCI address.
5–20 System Address Mapping