User`s manual

Table 3 Alpha PCI 64–275 Board Jumpers
Connector Pins Description
L2 Cache Address Lines
J15 4 Adr<22:19> L2 cache; pins 22:19 are identified on the board.
Pin 19 corresponds to J15-1, and so forth.
J15-1
Adr19
J15-2
Adr20
J15-3
Adr21
J15-4
Adr22 Size
Out Out Out Out 512KB
In Out Out Out 1MB
In In Out Out 2MB (default)
In In In Out 4MB
In In In In 8MB
Flash ROM
J16 3 Flash ROM update enable/disable connector. Pin 1 of J16 is
identified on the board as pin 7; pin 3 is identified as pin 9. Pin
2 is center.
Jumper from pin 1 to pin 2 disables flash ROM update.
Jumper from pin 2 to pin 3 enables flash ROM update
(default).
(continued on next page)
11