User`s manual

J
Jumpers
BC_SIZE<2:0>, 2–5
BC_SPEED<2:0>, 2–4
BOOT_OPTION, 2–4
configuration, 2–1 to 2–7
CPU clock divisor, 2–7
flash ROM, 2–6
L2 cache address, 2–6
MINI_DEBUG, 2–4
sp_bit6, 2–4
sp_bit7, 2–4
sp_bit<2:0>, 2–5
sp_bit<5:3>, 2–4
K
Keyboard connector, 2–9
Keyboard controller, 1–5
L
L2 cache
address jumper, 2–6
SIMM connectors, 2–9
subsystem, 1–4
Level 2 cache
See L2 cache
Literature, B–2
M
Memory subsystem, 1–1
See DRAM
MINI_DEBUG jumper, 2–4
Mouse connector, 2–9
Mouse controller, 1–5
O
Operating Systems
See OS
Ordering products, B–1
OS
software support, 1–6
P
PAL control set, 1–4
Parallel interface, 1–5
Parallel port connector, 2–10
Parameters, 5–1, 5–2
Parts
ordering, B–1
PCI
arbitration, 4–1, 4–5
arbitration logic, 4–1
connectors, 2–9
interface overview, 1–5
interrupt logic, 4–1
Peripheral component interconnect
See PCI
Physical board parameters, 5–2
Power connectors, 2–11
Power distribution, 4–7
Power requirements, 5–1
See also Power distribution
R
RAM
See DRAM; SRAM
Registers
interrupt mask, 4–5
Related documentation, B–2
ROM
See Flash ROM; SROM
Index–3