User`s manual

Index
A
Alpha documentation, B–2
Arbitration
PCI, 4–1
scheme, 4–5
Associated literature, B–2
B
Backup cache
See L2 cache
Bank selection
flash ROM, 4–12
BC_SIZE<2:0> jumpers, 2–5
BC_SPEED<2:0> jumpers, 2–4
Block diagram
interrupt control and PCI arbitration
logic, 4–1
system, 1–1
Board
configuration, 2–1
connectors, 2–7, 2–9
overview, 1–1
parameters, 5–1, 5–2
BOOT_OPTION jumper, 2–4
Bridge
See SIO chip
C
Cache
See L2 cache
Chipset support, 1–4
Clock subsystem overview, 1–5
COM1 connector, 2–10
COM2 connector, 2–10
Components, 1–1
Configuration, 2–1
hardware, 3–2
software, 3–9
Connectors, 2–7 to 2–13
COM1, 2–10
COM2, 2–10
CPU fan, 2–12
DRAM SIMM, 2–10
Enclosure fan, 2–13
IDE, 2–10
ISA, 2–9
keyboard, 2–9
L2 cache SIMM, 2–9
mouse, 2–9
parallel port, 2–10
PCI, 2–9
power, 2–11
speaker, 2–13
SROM test, 2–10
system reset, 2–13
Console interface
code in flash ROM, 1–6
Conventions, viii
Index–1