User`s manual

4.1 PCI Interrupts and Arbitration

The ISA bus interrupt signals (irq0 through irq8 and irq12 through irq14)

are all nested through the SIO and then into the CPU. The interrupt

assignment is conﬁgurable but is normally used as follows:

Interrupt Level Interrupt Source

IRQ0 Interval timer

IRQ1 Keyboard

IRQ2 Chains interrupt from slave peripheral interrupt controller (PIC)

IRQ3 8-bit ISA from serial port COM2

IRQ4 8-bit ISA from serial port COM1

IRQ5 8-bit ISA from parallel port (or irq7)

IRQ6 8-bit ISA from diskette controller

IRQ7 8-bit ISA from parallel port (or irq5)

IRQ8 Unused (real-time clock internal to the SIO)

IRQ9, IRQ10,

IRQ11

16-bit ISA

IRQ12 Mouse

IRQ13 16-bit ISA

IRQ14 IDE

IRQ15 16-bit ISA

The AlphaPC64 timer interrupt is generated by the real-time clock by means

of cpu_irq1, rather than by the timer within the SIO, which would route the

interrupt through the ISA bus interrupts.

4–4 Functional Elements