User`s manual

1.2 System Components and Features
Figure 1–2 Maximum and Minimum SIMM Bank Layouts
LJ04134A.AI
DRAM 3
Unpopulated
J4
DRAM 1
Unpopulated
J6
DRAM 2
Unpopulated
J5
DRAM 0
Unpopulated
J7
DRAM 3 - 4MB SIMM
memData96 - 127 + Parity
J8
DRAM 1 - 4MB SIMM
memData32 - 63 + Parity
J10
DRAM 2 - 4MB SIMM
memData64 - 95 + Parity
J9
DRAM 0 - 4MB SIMM
memData0 - 31 + Parity
J11
DRAM 3 - 64MB SIMM
memData96 - 127 + Parity
J4
DRAM 1 - 64MB SIMM
memData32 - 63 + Parity
J6
DRAM 2 - 64MB SIMM
memData64 - 95 + Parity
J5
DRAM 0 - 64MB SIMM
memData0 - 31 + Parity
J7
DRAM 3 - 64MB SIMM
memData96 - 127 + Parity
J8
DRAM 1 - 64MB SIMM
memData32 - 63 + Parity
J10
DRAM 2 - 64MB SIMM
memData64 - 95 + Parity
J9
DRAM 0 - 64MB SIMM
memData0 - 31 + Parity
J11
Minimum 16MB DRAM Layout - Populated with 1M x 36 SIMMs
Maximum 512MB DRAM Layout - Populated with 16M x 36 SIMMs
Bank 0
16MB
Bank 1
0MB
16MB
Bank 0
256MB
Bank 1
256MB
512MB
AlphaPC64 Introduction 1–3