AlphaPC64 Motherboard User’s Manual Order Number: EC–QLJKB–TE Revision/Update Information: Digital Equipment Corporation Maynard, Massachusetts This document supersedes the AlphaPC64 Motherboard User’s Manual (EC–QLJKA–TE).
July 1995 Possession, use, or copying of the software described in this publication is authorized only pursuant to a valid written license from Digital or an authorized sublicensor. While Digital believes the information included in this publication is correct as of the date of publication, it is subject to change without notice.
Contents About This Manual . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . vii 1 AlphaPC64 Introduction 1.1 The AlphaPC64 Motherboard . . . . . . . . . 1.2 System Components and Features . . . . . 1.2.1 Memory Subsystem . . . . . . . . . . . . . 1.2.2 DECchip 21072 Support Chipset . . . 1.2.3 PAL Control Set . . . . . . . . . . . . . . . . 1.2.4 Level 2 Cache Subsystem Overview . 1.2.5 Clock Subsystem Overview . . . . . . . 1.2.6 PCI Interface Overview . . . . . . . .
3.4.3 Returning to Windows NT ARC Firmware from the Debug Monitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–10 4 Functional Elements 4.1 4.1.1 4.1.2 4.2 4.3 4.4 4.4.1 4.4.2 4.4.3 PCI Interrupts and Arbitration . System Interrupts . . . . . . . . PCI/ISA Arbitration . . . . . . . ISA Devices . . . . . . . . . . . . . . . . dc Power Distribution . . . . . . . . Flash ROM (System ROM) . . . . . Special Flash ROM Headers Flash ROM Structure . . . . . .
Index Figures 1–1 1–2 1–3 2–1 2–2 2–3 3–1 3–2 4–1 4–2 4–3 4–4 4–5 5–1 AlphaPC64 Functional Block Diagram . . . . . . . . . . . . . Maximum and Minimum SIMM Bank Layouts . . . . . . AlphaPC64 Component Layout and Board Dimensions AlphaPC64 Board Jumpers . . . . . . . . . . . . . . . . . . . . . J3 Jumpers/Connectors . . . . . . . . . . . . . . . . . . . . . . . . AlphaPC64 Board Connectors . . . . . . . . . . . . . . . . . . . Fan/Heat Sink Assembly . . . . . . . . . . . . . . . . . . . . . . .
About This Manual This manual describes Digital’s AlphaPC64 motherboard, a module for computing systems based on the Alpha 21064A microprocessor and the DECchip 21072 chipset. Audience This guide is intended for users of the AlphaPC64 to assist them in installing the board and populating it with memory modules and peripheral cards. Scope This guide describes the features, configuration, and installation of the AlphaPC64.
• Chapter 5, Board Requirements and Parameters, describes the AlphaPC64 power and environmental requirements, and identifies major board components. • Appendix A, Supporting Vendor Products, lists suggested vendor sources for supporting components, such as, power supply, SIMMs, enclosure, and so forth.
1 AlphaPC64 Introduction This chapter provides an overview of the AlphaPC64, its components, features, and uses. 1.1 The AlphaPC64 Motherboard The AlphaPC64 Motherboard (AlphaPC64) is a module for computing systems, based on the Alpha 21064A microprocessor and the DECchip 21072 chipset. The AlphaPC64 runs the Windows NT operating system. For information on Digital UNIX or OpenVMS operating system support, contact your local distributor or your Digital sales representative. 1.
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1.2 System Components and Features 1.2.2 DECchip 21072 Support Chipset The 21064A is supported by a DECchip 21072 ASIC chipset (21072), with a 128-bit memory interface. The chipset consists of the following three chips: • DECchip 21071-CA (21071-CA) provides the interface from the CPU to cache and main memory, and includes the cache and memory controller. • DECchip 21071-BA (21071-BA) provides a 32-bit data path from the CPU to memory and I/O. Four chips provide the 128-bit interface.
1.2 System Components and Features Table 1–1 L2 Cache SIMM Sizes L2 Cache Size Static RAM Access Times 512KB 6 ns, 8 ns, 10 ns, 12 ns, 15 ns 2MB 6 ns, 8 ns, 10 ns, 12 ns, 15 ns 8MB 6 ns, 8 ns, 10 ns, 12 ns, 15 ns 1.2.5 Clock Subsystem Overview The clock subsystem provides clocks to the 21072 chipset and PCI devices. Two oscillators provide clocks for the ISA and combination chip functions. 1.2.
1.2 System Components and Features 1.2.8 Software Support Software support includes an industry-standard, 1MB flash ROM containing Windows NT ARC firmware and debug monitor code. The debug monitor allows you to: • Download files through serial port, I/O diskette, and optional Ethernet port. • Load data from the flash ROM through the debug monitor. • Examine and deposit the AlphaPC64 system register, 21064A internal processor registers (IPRs), and I/O mapped registers.
1.2 System Components and Features 33.0 cm (13.0 in ± 0.0005 in) Figure 1–3 AlphaPC64 Component Layout and Board Dimensions 22.1 cm (8.7 in ± 0.0005 in) Scale = 90% LJ-04458.
1.2 System Components and Features Table 1–2 AlphaPC64 Summary Characteristic Description Operating Systems Supported operating systems Microsoft Windows NT. For information on Digital UNIX or OpenVMS operating system support, see your local distributor or your Digital sales representative.
1.2 System Components and Features Table 1–2 (Cont.) AlphaPC64 Summary Characteristic Description Graphics Graphics options Refer to the Microsoft Hardware Compatibility List for Windows NT to determine which graphics cards are supported. See Section B.4 for information on how to obtain the listing.
1.2 System Components and Features Table 1–2 (Cont.) AlphaPC64 Summary Characteristic Description Environmental Characteristics (Operating) Temperature 10°C to 40°C (50°F to 104°F) Temperature change rate (maximum) 20°C/hr (36°F/hr) Relative humidity Maximum wet bulb Minimum dew point 10%–90% noncondensing 32°C (90°F) 2°C (36°F) EMC compliance Compliance certification is the responsibility of the system integrator.
2 System Jumpers and Connectors The AlphaPC64 uses jumpers to implement variations in clock frequency and L2 cache size and speed. These jumpers must be configured for the user’s environment. Onboard connectors are provided for the I/O, memory SIMMs, serial and parallel peripherals, integrated device electronics (IDE) devices, and L2 cache SIMMs. After the module is configured, you can apply power and run the debug monitor.
2.1 Configuration Jumpers Figure 2–1 AlphaPC64 Board Jumpers J16 J15 J3 Scale = 90% 2–2 System Jumpers and Connectors LJ-04459.
2.1 Configuration Jumpers Figure 2–2 J3 Jumpers/Connectors sysclkdiv 1 2 jmp_irq2 3 4 jmp_irq1 5 6 jmp_irq0 7 8 toy_clr 9 10 sp_bit0 11 12 sp_bit1 13 14 sp_bit2 15 16 sp_bit3 17 18 sp_bit4 19 20 sp_bit5 21 22 sp_bit6 23 24 sp_bit7 25 26 gnd reset_button 27 28 hd_act_l 29 30 hd_led_l 31 32 gnd spkr 33 34 key_lock Vdd 35 36 gnd 37 38 gnd Vdd 39 40 power_led_l To Speaker LJ-04132.
2.1 Configuration Jumpers Table 2–1 Jumper Position Descriptions Select Bit Register Bit Name sp_bit7 BOOT_OPTION Jumper out—Boot first image in flash ROM. Jumper in (default)—Boot one of several alternate images in flash ROM as specified by NVRAM location 3F in TOY RAM. See Section 4.4. sp_bit6 MINI_DEBUG Jumper out (default)—Boot selected image in flash ROM. Jumper in—Trap to SROM debug port (J2). sp_bit<5:3> BC_SPEED<2:0> L2 cache speed selection is shown here.
2.1 Configuration Jumpers Table 2–1 (Cont.) Jumper Position Descriptions Select Bit Register Bit Name Function sp_bit<2:0> BC_SIZE<2:0> L2 cache size selection is shown here.
2.1 Configuration Jumpers 2.1.2 Hardware Configuration Jumpers Hardware configuration jumpers are shown in Figure 2–1 and are described in Table 2–2.
2.1 Configuration Jumpers Table 2–2 (Cont.) AlphaPC64 Board Jumpers Connector Pins Description System Clock Functions J3 4 21064A CPU clock divisor selection. J3-1 sysclkdiv J3-3 jmp_irq2 J3-5 jmp_irq1 J3-7 jmp_irq0 Divisor In In In In 2 In In In Out 3 In In Out In 4 In In Out Out 5 In Out In In 6 Divisor 6 is used for 200 MHz. In Out In Out 7 Divisor 7 is used for 233 MHz. In Out Out In 8 In Out Out Out 9 Divisor 9 is used for 275 MHz (default).
2.2 AlphaPC64 Board Connectors Figure 2–3 AlphaPC64 Board Connectors J32 J33 J34 J31 J30 J28 J25 J27 J24 J29 J26 J17 J18 J19 J20 J21 J22 J23 J14 J3 J4 J5 J6 J7 J8 J9 J10 J11 J12 J13 J2 J1 Scale = 90% 2–8 System Jumpers and Connectors LJ-04457.
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2.2 AlphaPC64 Board Connectors Table 2–3 (Cont.) Module Connector Descriptions Connector Pins Description Memory SIMMs J11 72 Bank 0, DRAM 0 SIMM J10 72 Bank 0, DRAM 1 SIMM J9 72 Bank 0, DRAM 2 SIMM J8 72 Bank 0, DRAM 3 SIMM J7 72 Bank 1, DRAM 0 SIMM J6 72 Bank 1, DRAM 1 SIMM J5 72 Bank 1, DRAM 2 SIMM J4 72 Bank 1, DRAM 3 SIMM SROM Test J2 6 SROM test data serial port input connector Note: This connector can be used as a terminal port for the Mini-Debugger.
2.2 AlphaPC64 Board Connectors Table 2–3 (Cont.) Module Connector Descriptions Connector Pins Description Power Connectors J27 J28 6 6 Module power connector (GND, +3.3 V) Pin Voltage/Signal 1 Ground 2 Ground 3 Ground 4 +3.3 V 5 +3.3 V 6 +3.3 V Module power connector (+3.3 V, GND) Pin Voltage/Signal 1 +3.3 V 2 +3.3 V 3 +3.
2.2 AlphaPC64 Board Connectors Table 2–3 (Cont.) Module Connector Descriptions Connector Pins Description J29 6 Module power connector (GND, –5 V, +5 V [Vdd]) J31 6 Pin Voltage/Signal 1 Ground 2 Ground 3 –5 V 4 Vdd 5 Vdd 6 Vdd Module power connector (GND, +12 V, –12 V, +5 V [Vdd], p_dcok) Pin Voltage/Signal 1 p_dcok 2 Vdd 3 +12 V 4 –12 V 5 Ground 6 Ground Note: Power for the AlphaPC64 is provided by a usersupplied, standard PC power supply that includes 3.3 V dc.
2.2 AlphaPC64 Board Connectors Table 2–3 (Cont.) Module Connector Descriptions Connector Pins Description Enclosure Fan J1 3 Enclosure fan connector (+12 V, GND) System Reset J3 (Pins 28, 30) 2 System reset switch connector Speaker Connector J3 (Pins 33, 35, 37, 39) 4 Speaker should be connected to pins 33, 35, 37, and 39.
3 Starting and Using the AlphaPC64 This chapter lists hardware, software, and accessories that users must obtain to completely furnish a functioning computer system. The chapter then describes how to configure the hardware and software. Finally, the chapter describes how to start and use the AlphaPC64. 3.1 Hardware Requirements Before turning on the power to your AlphaPC64, you must provide the following components in addition to those supplied with your board.
3.1 Hardware Requirements • A SCSI CD–ROM drive. • An IDE or SCSI hard drive. • A 3.5-in diskette drive and cable. • A 9-pin serial line cable. • A terminal or a serial line connection to a host system with appropriate cables. Refer to the Alpha Microprocessors Evaluation Board Windows NT 3.51 Installation Guide provided in the AlphaPC64 Windows NT 3.51 Installation Kit and the Hardware Compatibility List for Windows NT to determine which SCSI controllers and graphics cards are supported.
3.3 Hardware Configuration 1. Install the Alpha 21064A microprocessor in ZIF socket U36. a. Observe antistatic precautions. b. Lift the ZIF socket actuator handle to a full 90° angle. c. Make sure that all the pins on the Alpha 21064A are straight. d. The ZIF socket and Alpha 21064A are keyed to allow for proper installation. Align the Alpha 21064A, with its missing AD01 pin, with the corresponding plugged AD01 position on the ZIF socket. Gently lower into position. e.
3.3 Hardware Configuration Refer to Figure 3–1 for heat sink and fan assembly details. Figure 3–1 Fan/Heat Sink Assembly Screw, 6-32 x 0.875 in Qty 4 Guard, Fan Fan Clip, Heat Sink/Chip/Fan Nut, Hex, 10-32, 2011-T3 Aluminum, 0.375 in Across Flats, Qty 2 Torque to 15 +/- 2 in-lb Heat Sink, with Fan Mounting Holes Thermal Pad Alpha 21064A LJ-04412.
3.3 Hardware Configuration a. Put the GRAFOIL thermal pad in place. The GRAFOIL pad is used to improve the thermal conductivity between the chip package and the heat sink by replacing micro air pockets with a less insulative material. Perform the following steps to position the GRAFOIL pad: 1) Perform a visual inspection of the package slug to ensure that it is free of contamination. 2) Wearing clean gloves, pick up the GRAFOIL pad.
3.3 Hardware Configuration c. Perform the following steps to attach the heat sink fan assembly: 1) Place the fan assembly on top of the heat sink, aligning the fan mounting holes with the corresponding threaded heat sink holes. Align the fan so that the fan power/sensor wires exit the fan closest to connector J14 (see Figure 2–3). Fan airflow must be directed into the heat sink (fan label facing down toward the heat sink). 2) Place the fan guard on top of the fan.
3.3 Hardware Configuration Figure 3–2 AlphaPC64 Power Connectors J31 AlphaPC64 Board 1 J28 J27 1 1 1 J29 Alpha 21064A Microprocessor J27 Pin Voltage/Signal 1 Ground 2 Ground 3 Ground 4 +3.3 V 5 +3.3 V 6 +3.3 V J28 Pin Voltage/Signal 1 +3.3 V 2 +3.3 V 3 +3.
3.3 Hardware Configuration 8. If you are using an enclosure, mount the 3.5-in diskette drive, hard drive, and CD–ROM drive. Refer to the manufacturer’s instructions for installing these devices. 9. Connect the 3.5-in diskette drive. The 34-pin diskette drive cable goes from connector J24 on your AlphaPC64 to the diskette drive. The drive should be connected at the very end of the cable closest to the twist in the cable.
3.4 Software Configuration 3.4 Software Configuration Two firmware programs have been loaded into the AlphaPC64 1MB flash ROM. They are the debug monitor and the Windows NT ARC firmware. The debug monitor is a serial line monitor program used to perform software and hardware debug functions. The Windows NT ARC firmware is used to load and boot Windows NT. The AlphaPC64 system has been configured to start the Windows NT ARC firmware by default.
3.4 Software Configuration 5. Turn off the power to the AlphaPC64, and then turn the power back on. B. Turn off the power to the AlphaPC64, remove the jumper from J3-25/26 (SP7 on the board), and then turn on the power to the AlphaPC64. 3.4.3 Returning to Windows NT ARC Firmware from the Debug Monitor The following methods may be used to return to the Windows NT ARC firmware from the debug monitor. A. If you used item A in Section 3.4.
3.4 Software Configuration B. If you used item B in Section 3.4.2 to enter the debug monitor, then use this procedure to return to Windows NT ARC firmware: 1. Turn off the power to the AlphaPC64 and install the jumper at J3-25/26 (see SP7 on the board). 2. Turn on the power to the AlphaPC64. After the power-up diagnostics are run, the ARC console boot menu appears on the graphics display.
4 Functional Elements This chapter describes some of the functional elements of the AlphaPC64. Information, such as bus timing and protocol, found in other specifications, data sheets, and reference documentation is not duplicated. Appendix B provides a list of supporting documents and order numbers. Note For a detailed description of the Alpha 21064A, refer to the Alpha 21064 and Alpha 21064A Microprocessors Hardware Reference Manual.
4.
4.1 PCI Interrupts and Arbitration The AlphaPC64 interrupt controller has 17 interrupts: four from each of the four PCI slots (16) and one from the SIO bridge. All PCI interrupts are combined in the PLD and drive a single output signal, pci_isa_irq. This signal drives CPU input cpu_irq0 through a multiplexer. There is also a memory controller error interrupt and an I/O controller error interrupt within the CPU. Table 4–1 lists the CPU interrupt assignment during normal operation.
4.1 PCI Interrupts and Arbitration The ISA bus interrupt signals (irq0 through irq8 and irq12 through irq14) are all nested through the SIO and then into the CPU.
4.1 PCI Interrupts and Arbitration Interrupt PLDs Function The MACH210 PLD acts as an 8-bit I/O slave on the ISA bus at addresses 804h, 805h, and 806h. This is accomplished by a decode of the three ISA address bits sa<2:0> and the three ecas_addr<2:0> bits. Each interrupt can be individually masked by setting the appropriate bit in the mask register. An interrupt is disabled by writing a 1 to the desired position in the mask register. An interrupt is enabled by writing a 0.
4.2 ISA Devices 4.2 ISA Devices Figure 4–3 shows the AlphaPC64 ISA bus implementation with peripheral devices and connectors. Also shown is the utility bus (Ubus) with system support devices.
4.3 dc Power Distribution 4.3 dc Power Distribution The AlphaPC64 derives its system power from a user-supplied, industrystandard PC power supply. The power supply must provide +12 V dc, –12 V dc, –5 V dc, Vdd (+5 V dc), and +3.3 V dc. The dc power is supplied through power connectors J27, J28, J29, and J31 (see Figure 4–4). Power is distributed to the board logic through dedicated power planes within the 6-layer board structure.
4.3 dc Power Distribution Figure 4–4 dc Power Distribution J31 1 p_dcok 3 +12 V dc 4 -12 V dc IC Devices Clocks PCI Slots ISA Slots J29 3 4 -5 V dc Vdd 5 6 3 V dc Logic Fan J28 1 3 V dc 21064A 2 3 4 J31 5 2 Vdd 6 5 Ground 6 J27 1 Ground 2 J29 3 4 3 V dc 5 1 2 6 LJ04143A.
4.4 Flash ROM (System ROM) 4.4 Flash ROM (System ROM) The flash ROM, sometimes called the system ROM, is a 1MB, nonvolatile, writable ROM. After the SROM code initializes the AlphaPC64 system, flash ROM code prepares the system for booting. The flash ROM headers, structure, and access methods are described here. 4.4.1 Special Flash ROM Headers The MAKEROM tool is used to place a special header on ROM image files.
4.4 Flash ROM (System ROM) Table 4–2 Special Header Entry Descriptions Entry Description Validation and inverse validation pattern This quadword contains a special signature pattern used to validate that the special ROM header has been located. The pattern is 5A5AC3C3A5A53C3C. Header size (bytes) This longword contains the size of the header block, which varies among versions of the header specification. When the header is located, SROM code determines where the image begins based on the header size.
4.4 Flash ROM (System ROM) Table 4–2 (Cont.) Special Header Entry Descriptions Entry Description Header revision The revision of the header specifications used in this header. This is necessary to provide for changes to the header specification. Version 0 headers are identified by the size of the header (32 bytes). Flash ROM image size The flash ROM image size reflects the size of the image as it is contained in the flash ROM.
4.4 Flash ROM (System ROM) 4.4.2 Flash ROM Structure During the power-up and initialization sequence, the AlphaPC64 always loads the first image if the BOOT_OPTION jumper J3-25/26 is not installed. Then the first image (the debug monitor) will be booted. If jumper J3-25/26 is installed, the AlphaPC64 reads the value at location 3F of the TOY NVRAM. The AlphaPC64 uses the value found there to determine which image will be selected (see Table 4–3). The selected image is loaded and executed.
4.4 Flash ROM (System ROM) Changing TOY RAM Location 3F—Debug Monitor bootopt Command Use the debug monitor bootopt command to change the value in location 3F. In the example shown here, the bootopt command is used to change the value in location 3F from 0 to 1: AlphaPC64> bootopt 1 Predefined bootoptions are... "0" "Alpha Evaluation Board Debug Monitor" "DBM" "1" "The Windows NT Operating System" "NT" "2" "OpenVMS" "VMS" "3" "Digital UNIX" "UNIX" O/S type selected: "Alpha Evaluation Board Debug Monitor" .
4.4 Flash ROM (System ROM) 4.4.3 Flash ROM Access The flash ROM can be viewed as two banks of 512KB each. At power-up, the lower 512KB bank is accessed using the address range 3 FFF8 0000 to 3 FFFF FFFF. Setting address bit 19 will allow you to access the higher 512KB of flash ROM. Write a 1 to the register at address 800 to set address bit 19.
5 Board Requirements and Parameters This chapter describes the evaluation board power and environmental requirements, and physical board parameters. 5.1 Power Requirements The AlphaPC64 derives its main dc power from a user-supplied, industrystandard PC power supply. The board has a total power dissipation of 96.2 W, excluding PCI and ISA devices. Table 5–1 lists the power requirements of each dc supply voltage. The power supply must supply signal p_dcok to the system reset logic.
5.2 Environmental Characteristics 5.2 Environmental Characteristics The AlphaPC64 board environmental characteristics are: • Operating temperature range of 10°C to 40°C (50°F to 104°F) • Storage temperature range of –55°C to 125°C (–67°F to 257°F) 5.3 Physical Board Parameters The AlphaPC64 board consists of a 6-layer printed-wiring board. The board is populated with integrated circuit packages together with supporting active and passive components.
5.3 Physical Board Parameters Figure 5–1 Board Component Layout 41 39 37 38 43 40 42 44 45 46 51 47 48 50 49 36 6 28 27 30 24 1 35 34 29 7 33 8 23 2 26 25 22 31 32 17 16 9 4 10 21 15 11 20 14 19 13 3 12 5 18 Scale = 90% LJ-04460.
5.
5.3 Physical Board Parameters Table 5–2 (Cont.
A Supporting Vendor Products To obtain components and accessories that are not included with your AlphaPC64 motherboard, Digital Equipment Corporation suggests the following vendors. In doing so, Digital does not warrant these components or guarantee that they will function in all configurations. A.1 Products Included The following products are included in the AlphaPC64 motherboard kit. • Alpha microprocessor clock solution.
A.1 Products Included • L2 cache SIMMs (21A02-A3 does not include cache SIMMs) Cache Size SIMM Configuration Qty 512KB, 15 ns1 32K 2MB, 12 ns2 128K 1 Included 2 Included 2 96 2 92 Vendor/Part Number 2 Digital PN, 21A02-M1 Motorola PN, MCM96AA32SG15 2 Digital PN, 21A02-M2 Motorola PN, MCM92AA128SG12 Micron PN, MBDLS12896G-12 in 21A02-A5. in 21A02-A4. A.2 Products Not Included The following products are not included in the AlphaPC64 motherboard kit.
B Technical Support and Ordering Information B.1 Technical Support If you need technical support or help deciding which literature best meets your needs, call the Digital Semiconductor Information Line: United States and Canada Outside North America 1–800–332–2717 +1–508–628–4760 B.2 Ordering Digital Semiconductor Products To order the AlphaPC64 evaluation board and related products, contact your local distributor.
B.2 Ordering Digital Semiconductor Products Product Order Number 2MB, 12-ns L2 Cache SIMM for AlphaPC64 21A02–M2 Heat Sink Assembly 2106H–AA Alpha 21064 Evaluation Board Design Package 21A01–13 B.3 Ordering Associated Literature The following table lists some of the available Digital Semiconductor literature. For a complete list, contact the Digital Semiconductor Information Line.
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B.4 Ordering Third-Party Documentation B.
C Warranty Registration Information To register your AlphaPC64 motherboard and be notified of changes and updates, as well as new kits and products available from Digital Equipment Corporation, please complete the registration card included in the kit, or send the following information to the address listed below: Name Company Address Phone number FAX phone number Product purchased Serial number Date purchased Mail the information to: Digital Equipment Corporation Marketing/Product Updates HLO2-2/M9 77 Ree
Index A C Alpha documentation, B–2 Arbitration PCI, 4–1 scheme, 4–5 Associated literature, B–2 Cache See L2 cache Chipset support, 1–4 Clock subsystem overview, 1–5 COM1 connector, 2–10 COM2 connector, 2–10 Components, 1–1 Configuration, 2–1 hardware, 3–2 software, 3–9 Connectors, 2–7 to 2–13 COM1, 2–10 COM2, 2–10 CPU fan, 2–12 DRAM SIMM, 2–10 Enclosure fan, 2–13 IDE, 2–10 ISA, 2–9 keyboard, 2–9 L2 cache SIMM, 2–9 mouse, 2–9 parallel port, 2–10 PCI, 2–9 power, 2–11 speaker, 2–13 SROM test, 2–10 system re
CPU clock divisor jumpers, 2–7 CPU fan connector, 2–12 D dc power distribution, 4–7 See also Power requirements Debugging native, 1–6 source-level, 1–6 Debug monitor, 3–9 code in flash ROM, 1–6 starting, 3–9 DECchip 21071-BA, 1–4 DECchip 21071-CA, 1–4 DECchip 21071-DA, 1–4 DECchip 21072 chipset, 1–1, 1–4 DECladebug, 1–6 Digital Semiconductor Information Line, B–1 Diskette controller, 1–5 Diskette drive connector, 2–10 Documentation, B–2 DRAM, 1–1 SIMM connectors, 2–10 Dynamic RAM See DRAM E Enclosure fan
J O Jumpers BC_SIZE<2:0>, 2–5 BC_SPEED<2:0>, 2–4 BOOT_OPTION, 2–4 configuration, 2–1 to 2–7 CPU clock divisor, 2–7 flash ROM, 2–6 L2 cache address, 2–6 MINI_DEBUG, 2–4 sp_bit6, 2–4 sp_bit7, 2–4 sp_bit<2:0>, 2–5 sp_bit<5:3>, 2–4 Operating Systems See OS Ordering products, B–1 OS software support, 1–6 P L2 cache address jumper, 2–6 SIMM connectors, 2–9 subsystem, 1–4 Level 2 cache See L2 cache Literature, B–2 PAL control set, 1–4 Parallel interface, 1–5 Parallel port connector, 2–10 Parameters, 5–1, 5–2
S Saturn IO chip See SIO chip Serial interface, 1–5 Serial ROM See SROM, code; SROM, test connector SIMM bank layouts, 1–1 DRAM, 1–1 SRAM, 1–4 Single inline memory module See SIMM SIO chip, 1–5, 4–1 interrupt logic, 4–1 Software configuration jumpers, 2–1, 2–3, 2–4 Software requirements, 3–2 Software support, 1–6 Speaker connector, 2–13 sp_bit6 jumper, 2–4 sp_bit7 jumper, 2–4 sp_bit<2:0> jumpers, 2–5 sp_bit<5:3> jumpers, 2–4 SRAM, 1–5 SROM code, 1–6 test connector, 2–10 Static RAM See SRAM Support chipset,