Operating instructions
Theory
of
Operation-71380
The
Position
Voltage
Source
stage
combines
the do
voltages
of
the
FINE
and
POSITION
controls
for
a
position
voltage
level at
the
output
of
operational
amplifier
U416
.
This
vol-
tage
level
on
the
base
of
Q434
provides
a
ramp
waveform
offset
voltage
to
horizontally
position
the displayed
trace
.
The
Auxiliary
Sweep
Preamplifier
stage
provides
a
negative-
goingsweep
ramp
to
the
mainframe
(via
interface
connector
pins-A3
and
133)
for
sawtooth output
and
special
plug-in
unit
functions
.
Transistors
Q344
and
Q346
form
a
unity-
gain
inverting
amplifier
for
the
sawtooth
signal
from
the
Ramp
Voltage
Follower
stage
.
Diode
CR344
provides
emitter-base
compensation
.
Sweep
Gate
Generator
The
Sweep
Gate
Generator produces
an
unblanking
gate
for
the
Z-axis
system
of
the
mainframe
.
When
the
sweep
is
dis-
played,
the
crt
is
unblanked
(gate
level
LO)
.
The
sweep
is
blanked
(gate
level
H
I)
between
sweeps
.
Refer
to
Figure 3-6
.
The
sweep
ramp
is
applied
to
the
Sweep
Stop
Comparator
stage
.
A
comparison
voltage
is
set
at
the
base of
Q356
.
When
the
ramp
voltage
exceeds
the comparison
voltage,
Q352
turns
off
and
Q356
couples
a
HI
level
through
common-base
transistor
Q358
.
The
Sweep
Stop
Comparator
output
is
coupled
to
the
Sweep
Gate
Generator
stage
and
to
the
Logic
circuit
(diagram
3)
to
initiate
hold
off
.
The
Z-axis
gate
from
the
Trigger
Generator
circuit
(diagram
2)
is
LO
at
the
start
of
the
sweep
.
This
LO
level
turns
off
Q372
.
The
resultant
HI-level
sweep
gate
pulse
at
the
collec-
tor
of
Q372
is
coupled
through
emitter
follower
Q382
to
the
mainframe
for
sweep
unblanking
.
At
the
end
of
the
sweep,
the
HI
level
from
the
Sweep
Stop
Comparator
stage
turns
Q362
off
and
Q372
on
.
The
resultant
LO
is
coupled
through
emitter
follower
Q382
to
the
mainframe
for
sweep
blanking
.
TIME/DIVISION
READOUT
O5
The
Readout
circuits
provide
information
to
the
mainframe
readout
system
.
Readout
circuitry
is
shown
on
the
Time/
Division
Readout
(diagram
5) at
the
rear
of
this
manual
.
Basic
ReadoutSystem
The
readout system
in
7000-series
mainframes
provides
alpha-numeric
display
of
information
encoded
by the
plug-
in
units
.
This
display
is
presented
on
the
crt,
and
is
written
by
the
crt
beam
on
a
time-shared
basis
with
the analog
waveform
display
.
The
readout
system produces
a
pulse
train
consisting
of
ten
negative-going
pulses
called
time-slots
.
Each
pulse
represents
a
possible
character
in
a
readout
word,
and
is
assigned
a
time-slot
number
corresponding
to
its
position
in
the
word
.
Each
time-slot
pulse
is
directed to
one
of
ten
output
lines,
labeled
TS
1
through
TS
10
(time
slots
one
through
ten),
which
are
connected
to
the
vertical
and
horizontal
plug-in
compartments
.
Two
output
lines,
rowand
column,
are
con-
nected
from
each
channel
(two
channels
per
plug-in
com-
partment)
back
to
the
readout
system
.
Data
is
encoded
on
these
output
lines
either
by
connecting
resistors
between
them
and
the
time-slot
input
lines or
by
generating
equivalent
currents
.
The
resultant
output
is
a
sequence
of
analog
current
levels
on
the
row
and
column
output
lines
.
The
rowand
column
current
levels
are
decod-
ed
by the
readout
system
to
address
a
character
matrix
during
each time
slot,
thus
selecting
a
character
to
be
dis-
played
or
a
special
instruction
to
be
followed
.
INTERFACE
CONNECTO
POWER
SUPPLY
The
Interface
Connectors
provide
interconnection
for
con-
trol
signals
and
power
supply
voltages
between
the
main-
frame and
the
time-base
unit
.
The
Power
Supply
derives
supply
voltages
from
the
main-
frame
supplies
for
power
requirements
unique
to this
instrument
.
Additional
voltage
regulation
is
also
provided
.