Operating instructions
Theory
of
Operation-7880
+TRIGGER
TRIGGER
1986-62
PEAK-TO-PEAK
LEVEL
RANGE
.
The
Peak-to-Peak
Level
Range
stage
amplifies
the
peak
Detector
signals
to
provide
constant
amplitude
trigger
signals
and
to
determine the
range
of
the
front-panel
LEVEL
control
.
Peak
Detector
sig-
nal
amplitude
is
dependent
on
triggering
(input)
signal
amplitude
.
Peak Detector
signals
from
R58-1159
are
coupled
to
U55A-
pin
3 of
the
Peak-to-Peak
Level
Range
stage
.
The
gain
of
the
feedback
amplifier
(consisting
of
U55A
and
pins
1
and
20
of
U65)
increases
as
the
Peak
Detector
signal
amplitude
is
reduced,
thereby
producing
a
constant
trigger
signal
level
at
U65-pins
16
and
17
.
The
range
of the
front-panel
LEVEL
control
is
zero
at
mini-
mum
triggering
signal
amplitude
.
The
LEVEL
range
in-
creases
as
triggering
signal
amplitude
increases,
until
it
reaches
maximum
level
range
at
the
Automatic
Gain Con-
trol
threshold
.
Refer
to
the
Specification
section
in this
manual
for
triggering
sensitivity
and
triggering
LEVEL
range
parameters
.
Automatic
Gain
Control
.
The
Automatic
Gain
Control
stage
limits
the
trigger
signal
amplitude
to
approximately
450
millivolts
peak-to-peak
(at
U65-pins
16
and
17)
regard-
less
of
the
trigger
input
signal
amplitude
.
The
level
of
the
peak
detected
signal
from
R58-1159
is
sensed
by
a
feedback
amplifier
stage
(U55A
and
pins
1
and
20
of
U65)
.
When
the
peak
detected
signal
is
above
the
Automatic
Gain
Control
threshold
(resulting
from
approximately
2
divisions
of
in-
ternal
trigger
signal
or approximately 50
millivolts
external
trigger
signal),
the
Automatic
Gain
Control
stage
limits
the
output
trigger
signal
amplitude
at
U65-pins
16
and
17
.
Cur-
rent into
U65-pin
3
(established
by
R51)
determines
the
current
reference
that
sets
the
Automatic
Gain
Control
threshold
.
Fig
.
3-3
.
Functional
diagram
of Trigger
Source
Selector
.
Slope
Selector
and
Trigger
Generator
Integrated
circuit
U85
converts
the
differential
trigger
sig-
nal
from
the
Trigger
Source
Selector
and
Amplifier block
to
a
differential
gate
waveform
for
use
by
the
Gate
Generator
stage
.
SLOPE
switch
S60
is
connected
to
U85-pin
1
to
determine
whether
the
display
is
triggered
on
the
positive-going
or
negative-going
slope
.
When
the
SLOPE
switch
is
set
to
+,
a
positive-going
signal
on
pin
13
produces
a
positive-going
gate
on
pin
3 and
a
negative-going gate
on
pin
4
.
When
the
SLOPE
switch
is
set
to -,
a
negative-going
signal
on
pin
13
produces
a
positive-going
gate
on
pin
3
and
a
negative-going
gate
on
pin
4
.
Slope
Balance
adjustment
R80
provides
opti-
mum
input
balance
for
both
+
and
-
SLOPE-operation
.
The
delay
mode
control
signal
into
U85-pin
16
is
functional
only
when
the
unit
is
operating
as
a
delayed
sweep
unit
in
the
B
Horizontal
compartment
of a
mainframe
with
2
hori-
zontal
compartments
.
When
the
unit
is
operating
in
the
independent
or
triggerable
after
delay
time
modes
(as
deter-
mined
by the
delaying
sweep
time-base
unit
in
the
A
hori-
zontal
compartment),
there
is
no
effect
on
the
Trigger
Generator
circuits
.
However,
when
the
unit
is
operating
in
the
B
starts
after
delay
time
mode,
a HI
level
at
U85-pin
16
supplies
a
trigger gate
pulse
to
U85-pins
3 and 4
in
the
ab-
sence
of
a
trigger
disable
pulse
at
pins
6
and
10
.
At
the
end
of
each
sweep, the
Logic
circuits
(diagram
3)
supply
a
trigger
disable
pulse
through
Q242
to
U85-pins
6
and
10
.
A
HI
level
disables
the
Trigger
Generator
to
allow
enough
time
for
the
sweep
generator
to
stabilize
before
an-
other
trigger
pulse
starts
the
next
sweep
.
EXTERNAL
INPUT
TRIGGER
SOURCE
SELECTOR
17
LINE
INPUT
PARTIAL
U65
INTERNAL
INPUT
16