Manual

ManualsBrandsDigilent ManualsHardwareParallel Interface Model

Digilent Parallel Interface Model Digilent, Inc.

www.digilentinc.com Copyright Digilent, Inc. Page 5

Example Source Code:

The following is an example of the interface implemented in VHDL.

----------------------------------------------------------------------------

-- DPIMREF.VHD -- Digilent Parallel Interface Module Reference Design

----------------------------------------------------------------------------

-- Author: Gene Apperson

----------------------------------------------------------------------------

-- This module contains an example implementation of Digilent Parallel

-- Interface Module logic. This interface is used in conjunction with the

-- DPCUTIL DLL and a Digilent Communications Module (USB, EtherNet, Serial)

-- to exchange data with an application running on a host PC and the logic

-- implemented in a gate array.

-- See the Digilent document, Digilent Parallel Interface Model Reference

-- Manual (doc # 560-000) for a description of the interface.

-- This design uses a state machine implementation to respond to transfer

-- cycles. It implements an address register, 8 internal data registers

-- that merely hold a value written, and interface registers to communicate

-- with a Digilent DIO4 board. There is an LED output register whose value

-- drives the 8 discrete leds on the DIO4. There are two input registers.

-- One reads the switches on the DIO4 and the other reads the buttons.

-- Interface signals used in top level entity port:

-- mclk - master clock, generally 50Mhz osc on system board

-- pdb - port data bus

-- astb - address strobe

-- dstb - data strobe

-- pwr - data direction (described in reference manual as WRITE)

-- pwait - transfer synchronization (described in reference manual

-- as WAIT)

-- rgLed - LED outputs to the DIO4

-- rgSwt - switch inputs from the DIO4

-- ldb - led gate signal for the DIO4

-- rgBtn - button inputs from the DIO4

-- btn - button on system board (D2SB or D2FT)

-- led - led on the system board

----------------------------------------------------------------------------

-- Revision History:

-- 06/09/2004(GeneA): created

-- 08/10/2004(GeneA): initial public release

----------------------------------------------------------------------------

library IEEE;

use IEEE.STD_LOGIC_1164.ALL;

use IEEE.STD_LOGIC_ARITH.ALL;

use IEEE.STD_LOGIC_UNSIGNED.ALL;

-- Uncomment the following lines to use the declarations that are

-- provided for instantiating Xilinx primitive components.

--library UNISIM;

--use UNISIM.VComponents.all;

entity dpimref is