Data Sheet

Nexys Video™ FPGA Board Reference Manual
Copyright Digilent, Inc. All rights reserved.
Other product and company names mentioned may be trademarks of their respective owners.
Page 12 of 29
with Xilinx part number EF-DI-TEMAC-PROJ or EF-DI-TEMAC-SITE. A free evaluation of this core is available;
however, the design will stop working after running for approximately 8 hours.
On an Ethernet network, each node needs a unique MAC address. To this end, a Microchip 24AA025E48 EEPROM
is provided on the Nexys Video. On one hand, it is a read-writeable EEPROM that can be accessed via I
2
C. On the
other hand, it features a read-only memory section that comes pre-programmed with a unique identifier. This
unique identifier can be read and used as a MAC address, avoiding a possible address conflict on the network. The
device address of the EEPROM is 1010000b. The out-of-box Ethernet demo uses the unique MAC to allow
connecting several Nexys Video boards to the same network.
A tutorial that describes how to create a simple server using a MicroBlaze softcore processor and the Xilinx AXI
Ethernet Subsystem IP core is available on the Nexys Video Resource Center.
Use only shielded Ethernet cables.
AA15
AA16
Y16
Artix-7
MDIO
8
MDC
AB16 RXD0/SELRGV
Realtek RTL8211E
RJ-45 with
magnetics
RXD1/TXDLY
RXD2/AN0AB15
W10
AB11 RXD3/AN1
RXCTL/PHY_AD2
RXCV13
W12
Y12 TXD0
TXD1
TXD2W11
V10
Y11 TXD3
TXCTL
TXCAA14
U7
Y14 INTB
PHYRSTB
DSC1101CE2
25 MHz
Oscillator
CKXTAL1
ACT LED (LD10)
LED0/PHY_AD0
LED1/PHY_AD1
LINK LED
(LD9)
LINK LED (LD8)
LED2/RXDLY
EEPROM
V5
W5
Figure 4. Pin connections between the Artix-7 and the Ethernet PHY.
5 Oscillators/Clocks
The Nexys Video board includes a single 100 MHz crystal oscillator connected to pin R4 (R4 is a MRCC input on
bank 34). The input clock can drive MMCMs or PLLs to generate clocks of various frequencies and with known
phase relationships that may be needed throughout a design. Some rules restrict which MMCMs and PLLs may be