Instruction Manual

XUP Virtex-II Pro Development System www.xilinx.com 13

UG069 (v1.0) March 8, 2005

Chapter 1

XUP Virtex-II Pro Development System

Features

• Virtex™-II Pro FPGA with PowerPC™ 405 cores

• Up to 2 GB of Double Data Rate (DDR) SDRAM

• System ACE™ controller and Type II CompactFlash™ connector for FPGA

configuration and data storage

• Embedded Platform Cable USB configuration port

• High-speed SelectMAP FPGA configuration from Platform Flash In-System

Programmable Configuration PROM

• Support for “Golden” and “User” FPGA configuration bitstreams

• On-board 10/100 Ethernet PHY device

• Silicon Serial Number for unique board identification

• RS-232 DB9 serial port

• Two PS-2 serial ports

• Four LEDs connected to Virtex-II Pro I/O pins

• Four switches connected to Virtex-II Pro I/O pins

• Five push buttons connected to Virtex-II Pro I/O pins

• Six expansion connectors joined to 80 Virtex-II Pro I/O pins with over-voltage

protection

• High-speed expansion connector joined to 40 Virtex-II Pro I/O pins that can be used

differentially or single ended

• AC-97 audio CODEC with audio amplifier and speaker/headphone output and line

level output

• Microphone and line level audio input

• On-board XSGA output, up to 1200 x 1600 at 70 Hz refresh

• Three Serial ATA ports, two Host ports and one Target port

• Off-board expansion MGT link, with user-supplied clock

• 100 MHz system clock, 75 MHz SATA clock

• Provision for user-supplied clock

• On-board power supplies

• Power-on reset circuitry

• PowerPC 405 reset circuitry