User Manual

Port Rail Max Capacitance (µF)
Zmod Port A VIO 1000
Zmod Port B VCC5V0 500
Zmod Port B VCC3V3 500
Zmod Port B VIO 1000
Pmod Port A VCC3V3 500
Pmod Port B VCC3V3 500
A custom power sequencer (IC29) is used to sequence the power supplies on in the correct order when the power switch is placed in the
“ON” position. The power supplies shut down in the opposite order when the power switch is moved to the “OFF” position. The
startup sequence is as follows:
1. VCC5V0, FAN5V0
2. VCC1V0
3. VCC1V8
4. DDR1V35, DDRVTT
5. VCC3V3
6. VCC4V3
7. VADJA, VADJB, VADJC
1.3. Power Sequencing
The sequencer is provided 3.3V power by a dedicated regulator, a Texas Instruments LP2985 (IC28).
The sequencer ensures that the supply rails follow the Xilinx-recommended start-up and shut-down sequences.
Note: VADJA, VADJB, and VADJC are controlled by the Platform MCU (PMCU) and may or may not be enabled, depending on the PMCU
configuration and presence (or lack thereof) of any pods connected to Zmod A or Zmod B. If the sum of the currents required by each Zmod is in excess of the
3A budget for VCC5V0, VADJA and VADJB are not turned on.
1.4. FPGA Fan
The FPGA fan is to be connected to the Eclypse Z7 via fan header J8 (labeled “FPGA”) and is powered by VADJC, an adjustable rail
controlled by the Platform MCU. The FPGA fan's speed can be configured to Automatic (the default factory setting), High, Medium,
Low, or Off, by communicating with the PMCU through its I2C interface. This configuration is preserved by the PMCU in an
EEPROM
(Electrically Erasable Programmable Read Only Memory) when the Eclypse's power is cycled. Additional information and configuration
settings, including RPM and speed controls, can be accessed through the PMCU's I2C interface.
1.5. Case Fan
In addition to the FPGA fan, the Eclypse Z7 can power a Case Fan, connected to the board via fan header J14 (labeled “CASE”). This
fan is powered by the 5V rail, and is limited to 250 mA. A compatible fan is included in the Eclypse Z7 Enclosure Kit
1.6. Platform MCU
As noted in previous sections, the Eclypse Z7 uses an Atmega328PB microcontroller (IC10), referred to as the Platform MCU (PMCU),
to implement the SmartVIO requirements of the SYZYGY standard, as well as to monitor the Zynq die temperature, and to control the
Eclypse's fan.
When the Eclypse is turned on, the PMCU enumerates the pods attached to the Eclypse's SYZYGY ports and retrieves their DNA, in
order to correctly configure the variable supplies.
After SYZYGY enumeration is complete, the PMCU configures itself as an I2C slave device with a chip address of 0x60. Control of the
I2C bus is then handed over to the Zynq's I2C 1 peripheral (MIO[12:13]). The Digilent Eclypse Utility (decutil) is included in the Eclypse
Z7 Base Petalinux Image which can be used to get status information from and change some settings of the PMCU.
The following tables describe the features of the Platform MCU supported by the Eclypse Z7:
Table 1.6.1: Platform MCU Connectivity Map