User Manual

Callout
# Description
Callout
# Description
Callout
# Description
2 Header for Case Power
Switch
8 Pmod Ports 14 microSD Card Slot
3 Power Switch 9 User Buttons and LEDs 15 USB JTAG/UART Port
4 FPGA Fan Header 10 DDR3L Memory 16 Ethernet Port
5 Zynq-7000 SoC and FPGA
Fan
11 Case Fan Header 17 USB AB Host/Device/OTG
Port
6 External JTAG Port 12 Programming Mode Select
Jumper
18 Power Supply Connector
The Eclypse Z7 includes an FPGA fan to dissipate extra heat generated from running complex fast-switching designs. A USB A to Micro
B programming cable, a USB A to Micro A cable, and a 12V 5A power supply, are included with the Eclypse Z7.
An Eclypse Z7 Enclosure Kit may optionally be added on, which provides a sturdy case for the Eclypse platform. The Enclosure Kit
includes a case fan for additional cooling, and exposes the connectors of loaded Zmod ADCs and DACs, as well as the Eclypse Z7's
Pmod expansion connectors, power switch, status LEDs, and more.
Digilent Zmods may also be purchased individually or bundled with the Eclypse Z7. Expansion connectors such as these, or other
SYZYGY modules, are required to fully leverage the high-speed I/O capabilities of the Eclypse platform.
Purchasing Options
Software Support
Zynq platforms are well-suited to be embedded Linux targets, and the Eclypse Z7 is no exception. Digilent provides software examples
targeting custom Petalinux projects, including support for each Digilent Zmod for high-speed I/O capabilities.
The Eclypse Z7 is fully compatible with Xilinx’s high-performance Vivado ® Design Suite. This tool set melds FPGA logic design and
embedded ARM software development into an easy to use, intuitive design flow. It can be used for designing systems of any complexity,
from a complete operating system running multiple server applications, down to a simple bare-metal program that controls some LEDs.
It is also possible to treat the Zynq AP SoC as a standalone FPGA for those not interested in using the processor in their design. The
Eclypse Z7 is supported under Vivado's free WebPACK™ license, which means the software is completely free to use, including the
Logic Analyzer and High-level Synthesis (HLS) features. The Logic Analyzer assists with debugging logic that is running in hardware, and
the HLS tool allows C code to be directly compiled into HDL.
Digilent currently does not provide hardware platforms or examples for Xilinx's Vitis Unified Software Platform, however Vitis support
is planned for the near future.
Zynq APSoC Architecture
The Zynq APSoC is divided into two distinct subsystems: The Processing System (PS) and the Programmable Logic (PL). The figure
below shows an overview of the Zynq APSoC architecture, with the PS colored light green and the PL in yellow. Note that the PCIe
Gen2 controller and Multi-gigabit transceivers are not available on the Zynq-7020 device.
The PL is nearly identical to a Xilinx 7-series Artix FPGA, except that it contains several dedicated ports and buses that tightly couple it
to the PS. The PL also does not contain the same configuration hardware as a typical 7-series FPGA, and it must be configured either
directly by the processor or via the JTAG port.