User Manual

21/02/2020 Eclypse Z7 Hardware Reference Manual [Reference.Digilentinc]
After power-up the PHY starts with Auto Negotiation enabled, advertising 10/100/1000 link speeds and full duplex. If there is an
Ethernet-capable partner connected, the PHY automatically establishes a link with it, even with the Zynq not configured.
Two status indicator LEDs are located on the RJ-45 connector (J3) that indicate traffic (J3/LD2, right side of connector) and valid link
state (J3/LD1, left side of connector). Table 11.1 shows the default behavior.
Table 11.1: Ethernet status LEDs
Function Designator State Description
LINK J3/LD1 Steady on Link 10/100/1000
Blinking 0.4s ON, 2s OFF Link, Energy Efficient Ethernet (EEE) mode
ACT J3/LD2 Blinking Transmitting or Receiving
The Zynq incorporates two independent Gigabit Ethernet Controllers. They implement a 10/100/1000 half/full duplex Ethernet MAC.
Of these two, GEM 0 can be mapped to the MIO pins where the PHY interfaces. Since the MIO bank is powered from 1.8V, the RGMII
interface uses 1.8V HSTL Class 1 drivers. For this I/O standard an external reference of 0.9V is provided in bank 501 (PS_MIO_VREF).
Mapping out the correct pins and configuring the interface is handled by the Eclypse Z7 Vivado board files.
Although the default power-up configuration of the PHY might be enough in most applications, the MDIO bus is available for
management. The RTL8211E-VL is assigned the 5-bit address 00001 on the MDIO bus. With simple register read and write commands,
status information can be read out or configuration changed. The Realtek PHY follows industry-standard register map for basic
configuration.
The RGMII specification calls for the receive (RXC) and transmit clock (TXC) to be delayed relative to the data signals (RXD[0:3],
RXCTL and TXD[0:3], TXCTL). Xilinx PCB guidelines also require this delay to be added. The RTL8211E-VL is capable of inserting a
2ns delay on both the TXC and RXC so that board traces do not need to be made longer.
On an Ethernet network each node needs a unique MAC address. To this end, the one-time-programmable (OTP) region of the Quad-
SPI flash has been programmed at the factory with a 48-bit globally unique EUI-48/64™ compatible identifier. The OTP address range
[0x20;0x25] contains the identifier with the first byte in transmission byte order being at the lowest address. Refer to the
Flash
memory datasheet (https://www.cypress.com/file/448601/download) for information on how to access the OTP regions. When using
Petalinux, this is automatically handled in the U-boot boot-loader, and the Linux system is automatically configured to use this unique
MAC address. The identifier is also printed on a sticker found on the top-side of the Eclypse Z7 right next to the mode jumper (JP5) and
above the headphone output jack.
For getting started using the ethernet port in a bare-metal application, Xilinx provides a lwip TCP/IP stack that can be automatically
generated in Xilinx SDK along with an echo server example. When using the Eclypse Z7 with a Petalinux generated embedded Linux
system, the ethernet port will automatically appear as a network device typically named eth0. See the Petalinux and Xilinx SDK
documentation for more information.
For more low-level information on using the Zynq-7000 Gigabit Ethernet MAC, refer to the Xilinx Zynq Technical Reference Manual.
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12.
Basic I/O
The Eclypse Z7 includes two push-buttons and two tri-color LEDs connected to the Zynq PL, as shown in Figure 12.1. These I/Os are
connected to the Zynq via series resistors to prevent damage from inadvertent short circuits (a short circuit could occur if a pin assigned
to a push-button was inadvertently defined as an output).
12.1. Push-Buttons
The push-buttons are “momentary” switches that normally generate a low output when they are at rest, and a high output only when
they are pressed.
12.2. Tri-Color LEDs
Each tri-color LED (Light Emitting Diode) has three input signals that drive the cathodes of three smaller internal LEDs: one red, one
blue, and one green. Driving the input signal corresponding to one of these colors low will illuminate the internal LED (Light Emitting
Diode). The input signals are driven by the Zynq PL through a transistor, which inverts the signals. Therefore, to light up the tri-color