300 Henley Court Pullman, WA 99163 509.334.6306 www.store. digilent.com Zybo Z7 Board Reference Manual Revised September 14, 2017 This manual applies to the Zybo Z7 rev. B Table of Contents Overview............................................................................................................................... 3 Purchasing Options................................................................................................................ 5 Software Support ...............................
Zybo Z7 Board Reference Manual 5 Oscillators/Clocks ........................................................................................................ 15 6 Reset Sources............................................................................................................... 16 6.1 Power-on Reset .............................................................................................................. 16 6.2 Programmable Logic Reset......................................................
Zybo Z7 Board Reference Manual Overview The Zybo Z7 is a feature-rich, ready-to-use embedded software and digital circuit development board built around the Xilinx Zynq-7000 family. The Zynq family is based on the Xilinx All Programmable System-on-Chip (AP SoC) architecture, which tightly integrates a dual-core ARM Cortex-A9 processor with Xilinx 7-series Field Programmable Gate Array (FPGA) logic.
Zybo Z7 Board Reference Manual Callout 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Description Power Switch Power select jumper USB JTAG/UART port MIO User LED MIO Pmod port USB 2.
Zybo Z7 Board Reference Manual Purchasing Options The Zybo Z7 can be purchased with either a Zynq-7010 or Zynq-7020 loaded. These two Zybo Z7 product variants are referred to as the Zybo Z7-10 and Zybo Z7-20, respectively. When Digilent documentation describes functionality that is common to both of these variants, they are referred to collectively as the “Zybo Z7”. When describing something that is only common to a specific variant, the variant will be explicitly called out by its name.
Zybo Z7 Board Reference Manual Note that due to the smaller FPGA in the Zynq-7010, it is not very well suited to be used in SDSoC for embedded vision applications. We recommend people purchase the Zybo Z7-20 if they are interested in these types of applications. Software Support The Zybo Z7 is fully compatible with Xilinx’s high-performance Vivado ® Design Suite. This tool set melds FPGA logic design and embedded ARM software development into an easy to use, intuitive design flow.
Zybo Z7 Board Reference Manual The PL is nearly identical to a Xilinx 7-series Artix FPGA, except that it contains several dedicated ports and buses that tightly couple it to the PS. The PL also does not contain the same configuration hardware as a typical 7-series FPGA, and it must be configured either directly by the processor or via the JTAG port.
Zybo Z7 Board Reference Manual MIO 500 3.3 V Pin 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 MIO 501 1.8V Pin 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 Pmod JF7 Peripherals SPI Flash GPIO CS DQ0 DQ1 DQ2 DQ3 SCLK LED4 SCLK FB JF8 JF2 JF3 JF4 JF1 JF9 JF10 ENET 0 TXCK TXD0 TXD1 TXD2 TXD3 TXCTL RXCK RXD0 RXD1 RXD2 RXD3 RXCTL Peripherals USB 0 SDIO 0 DATA4 DIR STP NXT DATA0 DATA1 DATA2 DATA3 CLK DATA5 DATA6 DATA7 Copyright Digilent, Inc. All rights reserved.
Zybo Z7 Board Reference Manual MIO 501 1.8V Pin 42 43 44 45 46 47 48 49 50 51 52 53 ENET 0 Peripherals USB 0 SDIO 0 D0 D1 D2 D3 RESETN CD MDC MDIO Functional Description 1 Power Supplies The Zybo Z7 power circuitry was carefully designed to meet the requirements of the Zynq-7000 and all other peripherals while also providing flexible input supply options. An overview of the power circuit is shown in Fig. 1.1. Figure 1.1.
Zybo Z7 Board Reference Manual The recommended power source is an external power supply (such as a wall-wart) with a barrel jack connector (also known as a coaxial power connector). The supply must use a center-positive 2.1mm internal-diameter plug and deliver between 4.5V to 5.5V DC. It should also be able to output at least 2.5 A (12.5 Watts) in order to support power-hungry Zynq projects and external peripherals.
Zybo Z7 Board Reference Manual Net name Upstream net name Power IC Type Power IC Label Min/Typ/Max Voltage (V) Max. Current VCC5V0 VU5V0 Power protection IC26 2.3V/5V/5.7V VCC3V3 VCC5V0 Buck IC25 3.3V +-10% See Table 1.1.1 1.5A VCC1V0 VCC1V35 VCC1V8 VCC5V0 VCC5V0 VCC5V0 Buck Buck Buck IC25 IC25 IC25 1.0V +-5% 1.35V +-5% 1.8V +-10% 2.1A 1.2A 0.6A XADC_1V8 XADC_1V25 VCC5V0 VCC3V3 LDO LDO IC25 IC27 0.1A 5mA ANA3V3 VCC5V0 LDO IC5 1.8V +- 10% 1.25V +0.12% 3.3V +- 10% 0.
Zybo Z7 Board Reference Manual Figure 1.4.1. Current consumption equation. 2 Zynq Configuration Unlike Xilinx FPGA devices, AP SoC devices such as the Zynq-7020 and Zynq-7010 are designed around the processor, which acts as a master to the programmable logic fabric and all other on-chip peripherals in the processing system. This causes the Zynq boot process to be more similar to that of a microcontroller than an FPGA.
Zybo Z7 Board Reference Manual Figure 2.1. Zybo Z7 configuration pins. The three boot modes are described in the following sections. 2.1 microSD Boot Mode The Zybo Z7 supports booting from a microSD card inserted into connector J4. The following procedure will allow you to boot the Zynq from microSD with a standard Zynq Boot Image created with the Xilinx tools: 1. 2. 3. 4. 5. 6. 7. 2.2 Format the microSD card with a FAT32 file system.
Zybo Z7 Board Reference Manual The Zybo Z7 is configured to boot in Cascaded JTAG mode, which allows the PS to be accessed via the same JTAG port as the PL. It is also possible to boot the Zybo Z7 in Independent JTAG mode by loading a jumper in JP3 and shorting it. This will cause the PS to not be accessible from the onboard JTAG circuitry, and only the PL will be visible in the scan chain.
Zybo Z7 Board Reference Manual 16 MiB (16,777,216 bytes) 1-bit, 2-bit, and 4-bit bus widths supported General use clock speeds up to 100 MHz, translating to 400 Mbps in Quad-SPI mode Zynq configuration clock speeds up to 94 MHz. Powered from 3.3V The Flash memory is used to provide non-volatile code and data storage. It can be used to initialize the PS and PL of the Zynq device with a Zynq Boot Image (also known as BOOT.BIN) generated using Xilinx tools such as Petalinux or Xilinx SDK.
Zybo Z7 Board Reference Manual Xilinx offers the Clocking Wizard IP core to assist in integrating the MMCM's and PLL's into a design. This wizard will properly instantiate the needed MMCMs and PLLs based on the desired frequencies and phase relationships specified by the user. The wizard will then output an easy-to-use wrapper component around these clocking resources that can be inserted into the user’s design. The clocking wizard can be accessed from within the Vivado and IP Integrator tools. Figure 5.
Zybo Z7 Board Reference Manual The PL is also cleared during a system reset. System reset does not cause the boot mode strapping pins to be resampled. 7 USB-UART Bridge (Serial Port) The Zybo Z7 includes an FTDI FT2232HQ USB-UART bridge (attached to connector J12) that lets you use PC applications to communicate with the board using standard COM port commands (or the tty interface in Linux). Drivers are automatically installed in Windows and newer versions of Linux when the Zybo Z7 is attached.
Zybo Z7 Board Reference Manual peripheral SDIO 0 is mapped out to these pins and controls communication with the SD card. The pinout can be seen in Table 8.1. The peripheral controller supports 1-bit and 4-bit SD transfer modes, but does not support SPI mode. Based on the Zynq Technical Reference Manual, SDIO host mode is the only mode supported.
Zybo Z7 Board Reference Manual 9 USB Host/OTG The Zybo Z7 implements one of the two available PS USB OTG interfaces on the Zynq device. A Microchip USB3320 USB 2.0 Transceiver Chip with an 8-bit ULPI interface is used as the PHY. The PHY features a complete HS-USB Physical Front-End supporting speeds of up to 480Mbs. The PHY is connected to MIO Bank 1/501, which is powered at 1.8V. The usb0 peripheral is used on the PS, connected through MIO[28-39].
Zybo Z7 Board Reference Manual Figure 10.1. Ethernet PHY signals. Two status indicator LEDs are on-board near the RJ-45 connector that indicate traffic (LD8) and valid link state (LD7). Table 10.1 shows the default behavior. Function LINK ACT Designator LD7 LD8 State Description Steady on Link 10/100/1000 Blinking 0.4s ON, 2s OFF Link, Energy Efficient Ethernet (EEE) mode Blinking Transmitting or Receiving Table 10.1. Ethernet status LEDs.
Zybo Z7 Board Reference Manual On an Ethernet network each node needs a unique MAC address. To this end, the one-time-programmable (OTP) region of the Quad-SPI flash has been programmed at the factory with a 48-bit globally unique EUI-48/64™ compatible identifier. The OTP address range [0x20;0x25] contains the identifier with the first byte in transmission byte order being at the lowest address. Refer to the Flash memory datasheet for information on how to access the OTP regions.
Zybo Z7 Board Reference Manual Pin/Signal SCL, SDA D[2]_P, D[2]_N HDMI TX Description DDC bidirectional (optional) Data output FPGA pin G17, G18 HDMI RX Description DDC bidirectional FPGA pin W18, Y19 B19, A20 Data input N20, P20 Table 11.1. HDMI pin description and assignment. 11.1 TMDS Signals HDMI/DVI is a high-speed digital video stream interface using transition-minimized differential signaling (TMDS).
Zybo Z7 Board Reference Manual The digital interface of the SSM2603 is wired to the programmable logic side of the Zynq. Audio data is transferred via the I²S protocol. Configuration is done over an I2C bus. The device address of the SSM2603 is 0011010b. All digital I/O are 3.3V level and connect to a 3.3V-powered FPGA bank.
Zybo Z7 Board Reference Manual can also be done in the codec. Configuration is read out and written by accessing the register map via I2C transfers. The register map is described in the SSM2603 datasheet. A demo project that uses the Zybo Z7 audio codec in a bare-metal application can be found on the Zybo Z7 Resource Center. The audio codec is also supported in Petalinux generated embedded Linux systems, and will appear as a standard ALSA audio device.
Zybo Z7 Board Reference Manual green. Driving the signal corresponding to one of these colors high will illuminate the internal LED. The input signals are driven by the Zynq PL through a transistor, which inverts the signals. Therefore, to light up the tricolor LED, the corresponding signals need to be driven high. The tri-color LED will emit a color dependent on the combination of internal LEDs that are currently being illuminated.
Zybo Z7 Board Reference Manual Figure 14.2. Fan Speed Feedback Signal It is possible to monitor the temperature of the Zynq device during operation over JTAG from the hardware server in Vivado. The maximum recommended operating temperature for the Zynq-7020 device is 85°C. If your design causes the temperature of the Zynq to approach the maximum, Digilent recommends you turn off the Zybo Z7-20 and attach a fan before running your design again.
Zybo Z7 Board Reference Manual Pin Number 1 2 Function GND MIPI CSI-2 Lane 0 (-) 3 MIPI CSI-2 Lane 0 (+) 4 5 GND MIPI CSI-2 Lane 1 (-) 6 MIPI CSI-2 Lane 1 (+) 7 8 GND MIPI CSI-2 Clock (-) 9 MIPI CSI-2 Clock (+) 10 11 12 13 14 15 GND GPIO GPIO SCL SDA 3V3 Zybo Z7 Connection Details GND Terminated and connected to 2 FPGA pins as described in XAPP894 Terminated and connected to 2 FPGA pins as described in XAPP894 GND Terminated and connected to 2 FPGA pins as described in XAPP894 Terminated and c
Zybo Z7 Board Reference Manual The MIPI CSI-2 bus is passively terminated on the Zybo Z7 and connected directly to the Zynq PL. The guidelines described in Xilinx application note XAPP894 D-PHY solutions were followed in order to implement a compatible DPHY receiver using the Zynq. The interface is tested to operate at up to 672 mbps on each lane. Speeds up to 950 mbps on each lane are possible based on the Zynq-7000 timing specifications, however they are not validated on the Zybo Z7.
Zybo Z7 Board Reference Manual Pmod Type Pin 9 Pin 10 Pmod JA XADC J16 J14 Pmod JB* High-Speed V6 W6 Pmod JC High-Speed T12 U12 Pmod JD High-Speed V17 V18 Pmod JE Standard T17 Y17 Pmod JF MIO MIO-14 MIO-15 *Pmod JB is not available on the Zybo Z7-10 Table 16.1. Zybo Z7 Pmod Pinout 16.1 Standard Pmod The standard Pmod ports are connected to the Zynq PL via 200 Ohm series resistors.
Zybo Z7 Board Reference Manual 16.4 High-Speed Pmod The High-speed Pmod ports use the standard Pmod connector, but have their data signals routed as impedance matched differential pairs for maximum switching speeds. They have pads for loading resistors for added protection, but the Zybo Z7 ships with these loaded as 0-Ohm shunts. With the series resistors shunted, these Pmods offer no protection against short circuits, but allow for much faster switching speeds.
