Datasheet

Artix-7 FPGAs Data Sheet: DC and AC Switching Characteristics
DS181 (v1.21) September 27, 2016 www.xilinx.com
Product Specification 9
SSTL18_II –0.300 V
REF
– 0.125 V
REF
+ 0.125 V
CCO
+0.300 V
CCO
/2–0.600 V
CCO
/2 + 0.600 13.40 –13.40
Notes:
1. Tested according to relevant specifications.
2. 3.3V and 2.5V standards are only supported in HR I/O banks.
3. Supported drive strengths of 4, 8, or 12 mA in HR I/O banks.
4. Supported drive strengths of 4, 8, 12, or 16 mA in HR I/O banks.
5. Supported drive strengths of 4, 8, 12, 16, or 24 mA in HR I/O banks.
6. For detailed interface specific DC voltage levels, see 7 Series FPGAs SelectIO Resources User Guide (UG471
).
Table 9: Differential SelectIO DC Input and Output Levels
I/O Standard
V
ICM
(1)
V
ID
(2)
V
OCM
(3)
V
OD
(4)
V, Min V, Typ V, Max V, Min V, Typ V, Max V, Min V, Typ V, Max V, Min V, Typ V, Max
BLVDS_25 0.300 1.200 1.425 0.100 – – – 1.250 – Note 5
MINI_LVDS_25 0.300 1.200 V
CCAUX
0.200 0.400 0.600 1.000 1.200 1.400 0.300 0.450 0.600
PPDS_25 0.200 0.900 V
CCAUX
0.100 0.250 0.400 0.500 0.950 1.400 0.100 0.250 0.400
RSDS_25 0.300 0.900 1.500 0.100 0.350 0.600 1.000 1.200 1.400 0.100 0.350 0.600
TMDS_33 2.700 2.965 3.230 0.150 0.675 1.200 V
CCO
–0.405 V
CCO
–0.300 V
CCO
–0.190 0.400 0.600 0.800
Notes:
1. V
ICM
is the input common mode voltage.
2. V
ID
is the input differential voltage (Q – Q).
3. V
OCM
is the output common mode voltage.
4. V
OD
is the output differential voltage (Q – Q).
5. V
OD
for BLVDS will vary significantly depending on topology and loading.
Table 10: Complementary Differential SelectIO DC Input and Output Levels
I/O Standard
V
ICM
(1)
V
ID
(2)
V
OL
(3)
V
OH
(4)
I
OL
I
OH
V, Min V,Typ V, Max V,Min V, Max V, Max V, Min mA, Max mA, Min
DIFF_HSTL_I 0.300 0.750 1.125 0.100 – 0.400 V
CCO
–0.400 8.00 –8.00
DIFF_HSTL_I_18 0.300 0.900 1.425 0.100 – 0.400 V
CCO
–0.400 8.00 –8.00
DIFF_HSTL_II 0.300 0.750 1.125 0.100 – 0.400 V
CCO
–0.400 16.00 –16.00
DIFF_HSTL_II_18 0.300 0.900 1.425 0.100 – 0.400 V
CCO
–0.400 16.00 –16.00
DIFF_HSUL_12 0.300 0.600 0.850 0.100 – 20% V
CCO
80% V
CCO
0.100 –0.100
DIFF_MOBILE_DDR 0.300 0.900 1.425 0.100 – 10% V
CCO
90% V
CCO
0.100 –0.100
DIFF_SSTL135 0.300 0.675 1.000 0.100 – (V
CCO
/2) – 0.150 (V
CCO
/2) + 0.150 13.0 –13.0
DIFF_SSTL135_R 0.300 0.675 1.000 0.100 – (V
CCO
/2) – 0.150 (V
CCO
/2) + 0.150 8.9 –8.9
DIFF_SSTL15 0.300 0.750 1.125 0.100 – (V
CCO
/2) – 0.175 (V
CCO
/2) + 0.175 13.0 –13.0
DIFF_SSTL15_R 0.300 0.750 1.125 0.100 – (V
CCO
/2) – 0.175 (V
CCO
/2) + 0.175 8.9 –8.9
DIFF_SSTL18_I 0.300 0.900 1.425 0.100 – (V
CCO
/2) – 0.470 (V
CCO
/2) + 0.470 8.00 –8.00
DIFF_SSTL18_II 0.300 0.900 1.425 0.100 – (V
CCO
/2) – 0.600 (V
CCO
/2) + 0.600 13.4 –13.4
Notes:
1. V
ICM
is the input common mode voltage.
2. V
ID
is the input differential voltage (Q – Q).
3. V
OL
is the single-ended low-output voltage.
4. V
OH
is the single-ended high-output voltage.
Table 8: SelectIO DC Input and Output Levels
(1)(2)
(Cont’d)
I/O Standard
V
IL
V
IH
V
OL
V
OH
I
OL
I
OH
V, Min V, Max V, Min V, Max V, Max V, Min mA, Max mA, Min