Datasheet
Artix-7 FPGAs Data Sheet: DC and AC Switching Characteristics
DS181 (v1.21) September 27, 2016 www.xilinx.com
Product Specification 62
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11/19/2014 1.17 Replaced -2L speed grade with -2LE throughout. Updated descriptions of V
CCINT
and V
CCBRAM
in
Table 2. Updated the AC Switching Characteristics based upon Vivado 2014.4. In Table 12, updated
Vivado software version and added a row for V
CCINT
= 0.95V. In Table 13, moved all speed grades for
all devices from Advance to Production. In Table 14, added Vivado 2014.4 software version to -1LI
(0.95V) speed grade column for commercial devices and applicable speed grades for XC7A15T and
XA7A15T devices, and removed table notes. Added Selecting the Correct Speed Grade and Voltage
in the Vivado Tools. In Table 16, moved LPDDR2 row to end of 2:1 Memory Controllers section.
Updated speed grade heading row in Table 52.
03/18/2015 1.18 In Table 11, changed maximum V
ICM
value from 1.425V to 1.500V. Removed LVDS 1.8V standard from
Table 19 and Table 20. Removed minimum sample rate specification from Table 65.
09/24/2015 1.19 Updated first paragraph in Introduction. Assigned quiescent supply currents to -1LI speed grade
Artix-7Q devices in Table 5. In Table 14, changed -1LI speed grade Artix-7Q device cells from N/A to
blank and added Note 1. Removed DIFF_SSTL12 standard from Table 19 and Table 20. Changed -1LI
speed grade Artix-7Q device cells from N/A to blank in Table 36, Table 39, Table 40, Table 41, Table 42,
Table 44, Table 45, and Table 46. Added SBV484, FBV484, FBV676, and FFV1156 packages to
Table 49. Removed Pb-free G suffix from packages in Table 50 and Table 52.
11/24/2015 1.20 In AC Switching Characteristics, updated to Vivado 2015.4. In Table 13, added -1LI (0.95V) speed
grade to Production column for XQ7A50T, XQ7A100T, and XQ7A200T. In Table 14, removed table note
and added Vivado 2015.4 software version to -1LI (0.95V) speed grade column for XQ7A50T,
XQ7A100T, and XQ7A200T. In Table 36, added T
CKSKEW
for XQ7A50T, XQ7A100T, and XQ7A200T
at -1LI (0.95V) speed grade. Updated device pin-to-pin output parameter tables (Table 39 to Table 42)
and input parameter tables (Table 44 to Table 46) for XQ7A50T, XQ7A100T, and XQ7A200T at -1LI
(0.95V) speed grade.
09/27/2016 1.21 Added XC7A12T and XC7A25T devices. Updated the AC Switching Characteristics based upon
Vivado 2016.3. In Table 19, updated V
MEAS
values for LVCMOS 3.3V, LVTTL 3.3V, and PCI33 3.3V,
and removed note 1. Removed LVDCI_15, HSLVDCI_15, LVDCI_15, and HSLVDCI_18 I/O standards
from Table 20.
Date Version Description