Datasheet

Artix-7 FPGAs Data Sheet: DC and AC Switching Characteristics
DS181 (v1.21) September 27, 2016 www.xilinx.com
Product Specification 56
XADC Specifications
Table 65: XADC Specifications
Parameter Symbol Comments/Conditions Min Typ Max Units
V
CCADC
= 1.8V ± 5%, V
REFP
= 1.25V, V
REFN
= 0V, ADCCLK = 26 MHz, –55°C ≤ Tj ≤ 125°C, Typical values at T
j
=+40°C
ADC Accuracy
(1)
Resolution 12 – – Bits
Integral Nonlinearity
(2)
INL –40°C ≤ T
j
≤ 100°C – – ±2 LSBs
–55°C ≤ T
j
< –40°C; 100°C < T
j
≤ 125°C – – ±3 LSBs
Differential Nonlinearity DNL No missing codes, guaranteed monotonic – – ±1 LSBs
Offset Error Unipolar –40°C ≤ T
j
≤ 100°C – – ±8 LSBs
–55°C ≤ T
j
< –40°C; 100°C < T
j
≤ 125°C – – ±12 LSBs
Bipolar –55°C ≤ T
j
≤ 125°C – – ±4 LSBs
Gain Error ––±0.5 %
Offset Matching – – 4 LSBs
Gain Matching ––0.3 %
Sample Rate –– 1 MS/s
Signal to Noise Ratio
(2)
SNR F
SAMPLE
= 500KS/s, F
IN
=20kHz 60 – – dB
RMS Code Noise External 1.25V reference – – 2 LSBs
On-chip reference – 3 – LSBs
Total Harmonic Distortion
(2)
THD F
SAMPLE
= 500KS/s, F
IN
=20kHz 70 – – dB
Analog Inputs
(3)
ADC Input Ranges Unipolar operation 0 – 1 V
Bipolar operation –0.5 – +0.5 V
Unipolar common mode range (FS input) 0 – +0.5 V
Bipolar common mode range (FS input) +0.5 – +0.6 V
Maximum External Channel Input Ranges Adjacent analog channels set within these
ranges should not corrupt measurements on
adjacent channels
–0.1 – V
CCADC
V
Auxiliary Channel Full
Resolution Bandwidth
FRBW 250 – – kHz
On-Chip Sensors
Temperature Sensor Error –40°C ≤ T
j
≤ 100°C – – ±4 °C
–55°C ≤ T
j
< –40°C; 100°C < T
j
≤ 125°C – – ±6 °C
Supply Sensor Error –40°C ≤ T
j
≤ 100°C – – ±1 %
–55°C ≤ T
j
< –40°C; 100°C < T
j
≤ 125°C – – ±2 %
Conversion Rate
(4)
Conversion Time - Continuous t
CONV
Number of ADCCLK cycles 26 – 32 Cycles
Conversion Time - Event t
CONV
Number of CLK cycles – – 21 Cycles
DRP Clock Frequency DCLK DRP clock frequency 8 – 250 MHz
ADC Clock Frequency ADCCLK Derived from DCLK 1 – 26 MHz
DCLK Duty Cycle 40 – 60 %