Datasheet

Artix-7 FPGAs Data Sheet: DC and AC Switching Characteristics
DS181 (v1.21) September 27, 2016 www.xilinx.com
Product Specification 36
Maximum Frequency
F
MAX_BUFR
(1)
Regional clock tree (BUFR) 420.00 375.00 315.00 315.00 315.00 315.00 MHz
Notes:
1. The maximum input frequency to the BUFR and BUFMR is the BUFIO F
MAX
frequency.
Table 35: Horizontal Clock Buffer Switching Characteristics (BUFH)
Symbol Description
Speed Grade
Units1.0V 0.95V 0.9V
-3 -2/-2LE -1 -1Q/-1M -1LI -2LE
T
BHCKO_O
BUFH delay from I to O 0.10 0.11 0.13 0.13 0.13 0.16 ns
T
BHCCK_CE
/
T
BHCKC_CE
CE pin setup and hold
0.19/0.13 0.22/0.15 0.28/0.21 0.28/0.42 0.28/0.21 0.35/0.25 ns
Maximum Frequency
F
MAX_BUFH
Horizontal clock buffer (BUFH) 628.00 628.00 464.00 464.00 464.00 394.00 MHz
Table 36: Duty Cycle Distortion and Clock-Tree Skew
Symbol Description Device
Speed Grade
Units1.0V 0.95V 0.9V
-3 -2/-2LE -1 -1Q/-1M -1LI -2LE
T
DCD_CLK
Global clock tree duty-cycle
distortion
(1)
All 0.20 0.20 0.20 N/A 0.20 0.25 ns
T
CKSKEW
Global clock tree skew
(2)
XC7A12T 0.26 0.26 0.26 N/A 0.26 ns
XC7A15T 0.26 0.26 0.26 N/A 0.26 0.33 ns
XC7A25T 0.26 0.26 0.26 N/A 0.26 ns
XC7A35T 0.26 0.26 0.26 N/A 0.26 0.33 ns
XC7A50T 0.26 0.26 0.26 N/A 0.26 0.33 ns
XC7A75T 0.27 0.33 0.36 N/A 0.36 0.48 ns
XC7A100T 0.27 0.33 0.36 N/A 0.36 0.48 ns
XC7A200T 0.40 0.48 0.54 N/A 0.54 0.69 ns
XA7A15T N/A 0.26 0.26 0.26 N/A N/A ns
XA7A35T N/A 0.26 0.26 0.26 N/A N/A ns
XA7A50T N/A 0.26 0.26 0.26 N/A N/A ns
XA7A75T N/A 0.33 0.36 0.36 N/A N/A ns
XA7A100T N/A 0.33 0.36 0.36 N/A N/A ns
XQ7A50T N/A 0.26 0.26 0.26 0.26 N/A ns
XQ7A100T N/A 0.33 0.36 0.36 0.36 N/A ns
XQ7A200T N/A 0.48 0.54 0.54 0.54 N/A ns
T
DCD_BUFIO
I/O clock tree duty cycle distortion All 0.14 0.14 0.14 0.14 0.14 0.14 ns
T
BUFIOSKEW
I/O clock tree skew across one
clock region
All 0.03 0.03 0.03 0.03 0.03 0.03 ns
Table 34: Regional Clock Buffer Switching Characteristics (BUFR) (Cont’d)
Symbol Description
Speed Grade
Units1.0V 0.95V 0.9V
-3 -2/-2LE -1 -1Q/-1M -1LI -2LE