Datasheet

Artix-7 FPGAs Data Sheet: DC and AC Switching Characteristics
DS181 (v1.21) September 27, 2016 www.xilinx.com
Product Specification 26
Table 26: IO_FIFO Switching Characteristics
Symbol Description
Speed Grade
Units1.0V 0.95V 0.9V
-3 -2/-2LE -1 -1Q/-1M -1LI -2LE
IO_FIFO Clock to Out Delays
T
OFFCKO_DO
RDCLK to Q outputs 0.55 0.60 0.68 0.68 0.68 0.81 ns
T
CKO_FLAGS
Clock to IO_FIFO flags 0.55 0.61 0.77 0.77 0.77 0.79 ns
Setup/Hold
T
CCK_D
/T
CKC_D
D inputs to WRCLK 0.47/0.02 0.51/0.02 0.58/0.02 0.58/0.18 0.58/0.02 0.76/0.09 ns
T
IFFCCK_WREN
/
T
IFFCKC_WREN
WREN to WRCLK 0.42/–0.01 0.47/–0.01 0.53/–0.01 0.53/–0.01 0.53/–0.01 0.70/–0.05 ns
T
OFFCCK_RDEN
/
T
OFFCKC_RDEN
RDEN to RDCLK 0.53/0.02 0.58/0.02 0.66/0.02 0.66/0.02 0.66/0.02 0.79/–0.02 ns
Minimum Pulse Width
T
PWH_IO_FIFO
RESET, RDCLK, WRCLK 1.62 2.15 2.15 2.15 2.15 2.15 ns
T
PWL_IO_FIFO
RESET, RDCLK, WRCLK 1.62 2.15 2.15 2.15 2.15 2.15 ns
Maximum Frequency
F
MAX
RDCLK and WRCLK 266.67 200.00 200.00 200.00 200.00 200.00 MHz