Manual

JTAG-SMT1 Programming Module for Xilinx® FPGAs
Copyright Digilent, Inc. All rights reserved.
Other product and company names mentioned may be trademarks of their respective owners.
Page 4 of 5
Mounting to Host PCBs
The JTAG-SMT1 module has a moisture sensitivity level (MSL) of 6. Prior to reflow, the JTAG-SMT1 module must be
dried by baking it at 125° C for 17 hours. Once this process has been completed, the module has a MSL of 3 and is
suitable for reflow for up to 168 hours without additional drying.
SMT1 signal pads are finished with the ENIG process using 2u” gold over 150u” electroless nickel. The SMT1 is
compatible with most mounting and reflow processes. The binding force of the solder is sufficient to hold the
SMT1 firmly in place; no additional adhesives are required.
0
50
100
150
200
250
300
-15
5
25
45
65
85
105
125
145
165
185
205
225
245
265
285
305
325
345
365
385
Reflow Temp. (
o
C)
Reflow Time (s)
JTAG SMT1 Profile
Symbol
Parameter
Min
Max
T
CK
T
CK
period
33ns
2.185ms
T
CKH
, T
CKL
T
CLK
pulse width
20ns
1.1ms
T
CD
T
CLK
to TMS, TDI
0
15ns
T
SU
TDO Setup time
19ns
T
HD
TDO Hold time
0
TMS/TDI
TCK
TDO
T
CKL
T
CKH
T
CK
T
CD
T
SU
T
HD