User`s manual

Rabbit 4000 Designer’s Handbook rabbit.com 17
3.4 PC Board Layout and Memory Line Permutation
To use the PC board real estate efficiently, it is recommended that the address and data lines to memory be
permuted to minimize the use of PC board resources. By permuting the lines, the need to have lines cross
over each other on the PC board is reduced, saving feed-through’s and space.
For static RAM, address and data lines can be permuted freely, meaning that the address lines from the
processor can be connected in any order to the address lines of the RAM, and the same applies for the data
lines. For example, if the RAM has 15 address lines and 8 data lines, it makes no difference if A15 from
the processor connects to A8 on the RAM and vice versa. Similarly D8 on the processor could connect to
D3 on the RAM. The only restriction is that all 8 processor data lines must connect to the 8 RAM data
lines. If several different types of RAM can be accommodated in the same PC board footprint, then the
upper address lines that are unused if a smaller RAM is installed must be kept in order. For example, if the
same footprint can accept either a 128K x 8 RAM with 17 address lines or a 512K x 8 RAM with 19
address lines, then address lines A18 and A19 can be interchanged with each other, but not exchanged with
A0–A17.
Permuting lines does make a difference with flash memory and must be avoided in practical systems.
3.5 PC Board Layout and Electromagnetic Interference
Most design failures are related to the layout of the PC board. A good layout results when the effects of
electromagnetic interference (EMI) are considered. For detailed information regarding this subject please
see Technical Note 221, “PC Board Layout Suggestion for the Rabbit 3000 Microprocessor.” This docu-
ment is available at: www.rabbit.com/docs/app_tech_notes.shtml.
3.5.1 Rabbit 4000 Low EMI Features
The Rabbit 4000 has powerful built-in features to minimize EMI. They are noted here. For details please
see The Rabbit 4000 Microprocessor User’s Manual.
• Separate power pins exist for core and I/O rings.
• The I/O bus can be separate from the memory bus.
• The external processor bus cycles are not all the same length.
• The external processor bus does not require running the clock around the PCB.
• The clock spectrum spreader option modulates the clock frequency.
• Some gated internal clocks are enabled only when needed.
• An internal clock doubler allows the external crystal oscillator to operate at 1/2 frequency.